參數(shù)資料
型號： XRT91L81
廠商： Exar Corporation
英文描述： 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： 2.488/2.666GBPS OC-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù)： 14/40頁
文件大?。?/td> 264K
代理商： XRT91L81
XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
PRELIMINARY
12
1.0
FUNCTIONAL DESCRIPTION
The XRT91L81 Transceiver is designed to operate with a SONET Framer/ASIC device and provide a high-
speed serial interface to optical networks. The Transceiver converts 4-bit parallel data at 622/666 MHz to a
serial CML bit stream at 2.488/2.666Gbps and vice-versa. It implements a clock multiplier unit (CMU), SONET/
SDH serialization/de-serialization (SerDes), limiting amplifier and receive clock and data recovery (CDR) unit.
The Transceiver is divided into Transmit and Receive sections and is used to provide the front end component
of SONET equipment, which includes primarily serial transmit and receive functions.
1.1
Hardware Mode vs. Host Mode
Functionality of the OC-48 Transceiver can be configured by using either Host mode or Hardware mode. If
Hardware mode is selected by pulling Host/HW "Low" or leaving this pin unconnected, the functionality is
controlled by the hardware pins described in the Hardware Pin Descriptions. However, if Host mode is
selected by pulling Host/HW "High", the functionality is controlled by programming internal R/W registers using
the Serial Microprocessor interface. Whether using Host or Hardware mode, the functionality remains the
same. Therefore, the following sections describe the functionality rather than how each function is controlled.
The Hardware Pin Descriptions and the Register Bit Descriptions concentrate on configuring the device.
1.2
Input Clock Reference
The XRT91L81 can accept either a 77.76/83.3MHz or 155.52/166MHz input clock at REFCLKP/N as its
internal timing reference for generating higher speed clocks. The reference clock can be provided with one of
two frequencies chosen by REFCLKSEL. The reference frequency options for the XRT91L81 are listed in
Table 2.
1.3
Forward Error Correction is used to control errors along a one-way path of communication. FEC sends extra
information along with data which can be used by a receiver to check and correct the data without requesting
re-transmission of the original information. It does so by introducing a known structure into a data sequence
prior to transmission. The most common methods are to replace a 14-bit data packet with a 15-bit codeword
structure, or to replace a 17-bit data packet with an 18-bit codeword structure. To maintain original bandwidth,
a higher speed clock reference, derived by the ratio of 15/14 or 18/17 referenced to 77.76MHz or 155.52MHz
is applied to the OC-48 transceiver using an external crystal. The XRT91L81 supports FEC by accepting an
input clock reference up to 83.3MHz or 166MHz. This allows the Transmit 4-bit Parallel Input Data to be
applied to the OC-48 transceiver at 666Mpbs which is converted to a 2.666Gbps serial output stream to an
optical module. A simplified block diagram of FEC is shown in Figure 2.
Forward Error Correction (FEC)
T
ABLE
2: R
EFERENCE
F
REQUENCY
O
PTIONS
(N
ORMAL
M
ODE
/FEC)
REFCLKSEL
R
EFERENCE
C
LOCK
F
REQUENCY
O
UTPUT
C
LOCK
F
REQUENCY
O
PERATING
M
ODE
0
77.76/83.3 MHz
2.488/2.666 GHz
OC-48/STM-16
1
155.52/166 MHz
2.488/2.666 GHz
OC-48/STM-16
F
IGURE
2. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
F
ORWARD
E
RROR
C
ORRECTION
OC-48
Transceiver
SONET/Framer
ASIC
OC-48
Transceiver
SONET/Framer
ASIC
F
F
相關(guān)PDF資料
PDF描述
XRT91L81IB 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT94L31_07 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L81IB 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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