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參數(shù)資料
| 型號(hào)： | ZL38001DGA |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| 中文描述： | DATACOM, ISDN ECHO CANCELLER, PDSO36 |
| 封裝： | 0.300 INCH, QSOP-36 |
| 文件頁數(shù)： | 29/47頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ZL38001DGA |
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ZL38001
Data Sheet
29
Zarlink Semiconductor Inc.
4.0 Register Summary
Bit
Name
Description
7
LIMIT
When high, the 2-bit shift mode is enabled in conjunction with bit 7 of LEC
register and when low 2-bit shift mode is disabled. Default limit for Rin and
Sin is 3.14 dBm0.
6
MUTE_R
When high, the Rin path is muted to quite code (after the NLP) and when low
the Rin path is not muted.
5
MUTE_S
When high, the Sin path is muted to quite code (after the NLP) and when low
the Sin path is not muted.
4
BYPASS
When high, the Send and Receive paths are transparently by-passed from
input to output and when low the Send and Receive paths are not bypassed.
3
NB-
When high, Narrowband signal detectors in Rin and Sin paths are disabled
and when low the signal detectors are enabled.
2
AGC-
When high, AGC is disabled and when low AGC is enabled.
1
AH-
When high, the Howling detector is disabled and when low the Howling
detector is enabled.
0
RESET
When high, the power initialization routine is executed presetting all registers
to default values.
This bit automatically clears itself to ’0’ when reset is complete.
Register Table 1 - Main Control Register (MC)
Bit
Name
Description
7
P-
When high, the Exponential weighting function for the adaptive filter is
disabled and when low the weighting function is enabled
6
ASC-
When high, the Internal Adaptation speed control is disabled and when low
the Adaptation speed is enabled.
5
NLP-
When high, the Non Linear Processor is disabled in the Sin/Sout path and
when low the NLP is enabled.
Register Table 2 - Acoustic Echo Canceller Control Register (AEC)
External Read/Write Address: 00
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
LIMIT
MUTE_R
MUTE_S
BYPASS
NB-
AGC-
AH-
RESET
External Read/Write Address:21
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
P-
ASC-
NLP-
INJ-
HPF-
HCLR
ADAPT-
ECBY
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PDF描述 |
|---|---|
| ZL38001 | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| ZL38001QDC | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| ZL38002QDG | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
| ZL38002QDG1 | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
| ZL38002 | Low-Voltage Acoustic Echo Canceller With Noise Reduction |
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| ZL38001DGA1 | 制造商:Microsemi Corporation 功能描述: |
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| ZL38001DGF1 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.711 W/OUT TONE DETECTION 36SSOP /B - Tape and Reel |
| ZL38001QDC | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.711 W/OUT TONE DETECTION 48TQFP - Trays |
| ZL38001QDC1 | 制造商:Microsemi Corporation 功能描述: |
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