參數(shù)資料
型號: ZL38001DGA
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: Low-Voltage Acoustic Echo Canceller with Low ERL Compensation
中文描述: DATACOM, ISDN ECHO CANCELLER, PDSO36
封裝: 0.300 INCH, QSOP-36
文件頁數(shù): 31/47頁
文件大?。?/td> 668K
代理商: ZL38001DGA
ZL38001
Data Sheet
31
Zarlink Semiconductor Inc.
Register Table 4 - Acoustic Echo Canceller Status Register (ASR)
(* Do not write to this register)
1
ADAPT-
When high, the Echo canceller adaptation is disabled and when low the
adaptation is enabled.
0
ECBY
When high, the Echo estimate from the filter is not substracted from the input
(Rin), when low the estimate is substracted.
Bit
Name
Description
7
-
RESERVED.
6
ACMUND
When low, No active signal in the Rin/Rout path.
5
HWLNG
When high, Howling is occurring in the loop and when low, no Howling is
detected.
4
-
RESERVED.
3
NLPDC
When high, the NLP is activated and when low the NLP is not activated.
2
DT
When high the Double Talk is detected and when low, the Double talk is not
detected.
1
NB
LOGICAL OR of the status bit NBS + NBR from LSR Register.
0
NBS
When high, the Narrowband signal has been detected in the Sin/Sout path
and when low, the Narrowband signal has not been detected in the Sin/Sout
path.
Bit
Name
Description
Register Table 3 - Line Echo Canceller Control Register (LEC) (continued)
External Read/Write Address: 01
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
SHFT
ASC-
NLP-
INJ-
HPF-
HCLR
ADAPT-
ECBY
External Read Address: 22
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
-
ACMUND
HWLNG
-
NLPDC
DT
NB
NBS
相關(guān)PDF資料
PDF描述
ZL38001 Low-Voltage Acoustic Echo Canceller with Low ERL Compensation
ZL38001QDC Low-Voltage Acoustic Echo Canceller with Low ERL Compensation
ZL38002QDG Low-Voltage Acoustic Echo Canceller With Noise Reduction
ZL38002QDG1 Low-Voltage Acoustic Echo Canceller With Noise Reduction
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