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參數(shù)資料
| 型號(hào)： | ZL38001QDC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| 中文描述： | DATACOM, ISDN ECHO CANCELLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, MS-026ABC, TQFP-48 |
| 文件頁數(shù)： | 36/47頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ZL38001QDC |
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ZL38001
Data Sheet
36
Zarlink Semiconductor Inc.
Register Table 11 - Receive (Rin) Peak Detect Register 2 (RIPD2)
Register Table 12 - Receive (Rin) ERROR Peak Detect Register 1 (REPD1)
Bit
Name
Description
7
RIPD
15
RIPD
14
RIPD
13
RIPD
12
RIPD
11
RIPD
10
RIPD
9
RIPD
8
These peak detector registers allow the user to monitor the receive in signal
(Rin) peak level at reference point R1 (see Figure 1). The information is in 16-
bit 2’s complement linear coded format presented in two 8-bit registers. The
high byte is in Register 2 and the low byte is in Register 1.
6
5
4
3
2
1
0
Bit
Name
Description
7
REPD
7
REPD
6
REPD
5
REPD
4
REPD
3
REPD
2
REPD
1
REPD
0
These peak detector registers allow the user to monitor the error signal peak
level at reference point R2 (see Figure 1). The information is in 16-bit 2’s
complement linear coded format presented in two 8-bit registers. The high
byte is in Register 2 and the low byte is in Register 1.
6
5
4
3
2
1
0
External Read Address: 17
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
RIPD
15
RIPD
14
RIPD
13
RIPD
12
RIPD
11
RIPD
10
RIPD
9
RIPD
8
External Read Address: 18
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
REPD
7
REPD
6
REPD
5
REPD
4
REPD
3
REPD
2
REPD
1
REPD
0
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