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參數(shù)資料
| 型號(hào)： | ZL38001QDC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Low-Voltage Acoustic Echo Canceller with Low ERL Compensation |
| 中文描述： | DATACOM, ISDN ECHO CANCELLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, MS-026ABC, TQFP-48 |
| 文件頁(yè)數(shù)： | 38/47頁(yè) |
| 文件大?。?/td> | 668K |
| 代理商： | ZL38001QDC |
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ZL38001
Data Sheet
38
Zarlink Semiconductor Inc.
Register Table 15 - Receive (Rout) Peak Detect Register 2 (ROPD2)
Register Table 16 - Send (Sin) Peak Detect Register 1 (SIPD1)
Bit
Name
Description
7
ROPD
15
ROPD
14
ROPD
13
ROPD
12
ROPD
11
ROPD
10
ROPD
9
ROPD
8
These peak detector registers allow the user to monitor the receive out signal
(Rout) peak level at reference point R3 (see Figure 1). The information is in
16-bit 2’s complement linear coded format presented in two 8-bit registers.
The high byte is in Register 2 and the low byte is in Register 1.
6
5
4
3
2
1
0
Bit
Name
Description
7
SIPD
7
SIPD
6
SIPD
5
SIPD
4
SIPD
3
SIPD
2
SIPD
1
SIPD
0
These peak detector registers allow the user to monitor the receive in signal
(Sin) peak level at reference point S1 (see Figure 1). The information is in 16-
bit 2’s complement linear coded format presented in two 8-bit registers. The
high byte is in Register 2 and the low byte is in Register 1.
6
5
4
3
2
1
0
External Read Address: 3B
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
ROPD
15
ROPD
14
ROPD
13
ROPD
12
ROPD
11
ROPD
10
ROPD
9
ROPD
8
External Read Address: 36
H
Reset Value: 00
H
7
6
5
4
3
2
1
0
SIPD
7
SIPD
6
SIPD
5
SIPD
4
SIPD
3
SIPD
2
SIPD
1
SIPD
0
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