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參數(shù)資料
| 型號(hào)： | ZL50015QCC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP256 |
| 封裝： | 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256 |
| 文件頁(yè)數(shù)： | 45/122頁(yè) |
| 文件大?。?/td> | 926K |
| 代理商： | ZL50015QCC |
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ZL50015
Data Sheet
45
Zarlink Semiconductor Inc.
15.5 Single Period Reference Monitoring
Values for short phase deviations (upper and lower limit) are programmable through registers. The unit of the binary
values of these numbers is 100 MHz clock period (10 ns). Single period deviation limits are more relaxed than multi
period limits, and are used for early detection of the reference loss, or huge phase jumps.
The values for the upper and lower limits are shown in the following table:
15.6 Multiple Period Reference Monitoring
To monitor reference failure based on frequency offset, multi period checking is performed. Reference validation
time is prescribed by Telcordia GR-1244-CORE and is between 10 and 30 seconds. To meet the criteria for
reference validation time, the time base for multi period monitoring has to be big enough. To implement hysteresis,
the upper limits are split into near upper and far upper limits and the lower limits are split into near lower and far
lower limits. The reference failure is detectable only when the reference passes far limits, but passing is not
detected until the reference is within near limits. The zone between near and far limits, called the “grey zone”, is
required by standards and prevents unnecessary reference switching when the selected reference is close to the
boundary of failure.
The monitor makes a decision about reference validity after two consecutive measurements with respect to its time
base. The time base for multi-period monitoring is 10 seconds. The time base is defined in the number of reference
clock cycles.
The device has two sets of limits the Stratum 4E default limits and the Relaxed Stratum 4E limits (see Table 12 on
page 45). The ST4_LIM bit in Table 26, DPLL Control Register (DPLLCR) Bits is used to select between the two
sets of limits.
Reference
Frequency
Comment
8 kHz
10 UIp-p
1.544 MHz
0.3 UIp-p
2.048 MHz
0.2 UIp-p
4.096 MHz
0.2 UIp-p
8.192 MHz
0.2 UIp-p
16.384 MHz
0.2 UIp-p
19.44 MHz
0.2 UIp-p
Table 11 - Values for Single Period Limits
Stratum 4E Default Limits
(in 10 ns units)
Relaxed Stratum 4E Limits
(in 10 ns units)
Far Upper Limit
-82.487 ppm
-250 ppm
Near Upper Limit
-64.713 ppm
-240 ppm
Nominal Value
0 ppm
Near Lower Limit
64.713 ppm
240 ppm
Far Lower Limit
82.487 ppm
250 ppm
Table 12 - Multi-Period Hysteresis Limits
相關(guān)PDF資料 |
PDF描述 |
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| ZL50015QCC1 | Enhanced 1 K Digital Switch with Stratum 4E DPLL |
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| ZL50018GAC | 2 K Digital Switch with Enhanced Stratum 3 DPLL |
| ZL50018QCC | 2 K Digital Switch with Enhanced Stratum 3 DPLL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50015QCC1 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL |
| ZL50015QCG1 | 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP |
| ZL50016 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch |
| ZL50016_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch |
| ZL50016GAC | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 1K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 1K-CH ENH 256PBGA |
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