參數(shù)資料
型號(hào)： ZL50015QCC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Enhanced 1 K Digital Switch with Stratum 4E DPLL
中文描述： TELECOM, DIGITAL TIME SWITCH, PQFP256
封裝： 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256
文件頁數(shù)： 60/122頁
文件大?。?/td> 926K
代理商： ZL50015QCC
ZL50015
Data Sheet
60
Zarlink Semiconductor Inc.
7
FPO2P
Output Frame Pulse (FPo2) Polarity Selection
When this bit is low, the output frame pulse FPo2 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo2 has the positive frame pulse format.
6
FPO2POS
Output Frame Pulse (FPo2) Position
When this bit is low, FPo2 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo2 starts from frame boundary (as defined by GCI-Bus).
5
CKO1P
Output Clock (CKo1) Polarity Selection
When this bit is low, the output clock CKo1 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo1 rising edge aligns with the
frame boundary.
4
FPO1P
Output Frame Pulse (FPo1) Polarity Selection
When this bit is low, the output frame pulse FPo1 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo1 has the positive frame pulse format.
3
FPO1POS
Output Frame Pulse (FPo1) Position
When this bit is low, FPo1 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo1 starts from frame boundary (as defined by GCI-Bus).
2
CKO0P
Output Clock (CKo0) Polarity Selection
When this bit is low, the output clock CKo0 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo0 rising edge aligns with the
frame boundary.
1
FPO0P
Output Frame Pulse (FPo0) Polarity Selection
When this bit is low, the output frame pulse FPo0 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo0 has the positive frame pulse format.
0
FPO0POS
Output Frame Pulse (FPo0) Position
When this bit is low, FPo0 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo0 starts from frame boundary (as defined by GCI-Bus).
Note: In Divided Slave modes, CKo3 - 1 cannot exceed frequency of CKi.
Note: CKo[5:4] are available in Master mode or in Slave mode with SLV_DPLLEN set.
Bit
Name
Description
Table 21 - Output Clock and Frame Pulse Selection Register (OCFSR) Bits (continued)
External Read/Write Address: 0004
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CKO4
P
CKO4
SEL
CKO
FPO3
SEL1
CKO
FPO3
SEL0
CKO3
P
FPO3
P
FPO3
POS
CKO2
P
FPO2
P
FPO2
POS
CKO1
P
FPO1
P
FPO1
POS
CKO0
P
FPO0
P
FPO0
POS
相關(guān)PDF資料
PDF描述
ZL50015QCC1 Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50018 2 K Digital Switch with Enhanced Stratum 3 DPLL
ZL50018GAC 2 K Digital Switch with Enhanced Stratum 3 DPLL
ZL50018QCC 2 K Digital Switch with Enhanced Stratum 3 DPLL
ZL50019 Enhanced 2 K Digital Switch with Stratum 4E DPLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50015QCC1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCG1 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL 制造商:Microsemi Corporation 功能描述:PB FREE 1K+RATE CONVERSION AND S4E DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 1K-CH ENH 256LQFP
ZL50016 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch
ZL50016_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch
ZL50016GAC 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 1K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 1K-CH ENH 256PBGA
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