25
10-34
10-35
10-36
10-37
10-38
10-39
10-40
10-41
10-42
10-43
Changing PWM Output Duty ..............................................................................................................
Example of Timer/Counter 2 PPG Signal Output ..............................................................................
Control Register Settings for PPG Output Operation .......................................................................
Setting Procedure of PPG Output......................................................................................................
Changing PPG Output Duty ...............................................................................................................
External Event Counter Operation .....................................................................................................
Control Register Settings for External Event Counter Operation.....................................................
Setting Procedure of External Event Counter Operation..................................................................
Operation When Counting Is Started.................................................................................................
Operation When Compare Register (CM20, CM21) Is Set to 0000H ..............................................
267
268
269
271
272
273
274
274
275
276
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
11-11
11-12
11-13
11-14
11-15
11-16
11-17
Block Diagram of Timer 4 ...................................................................................................................
Format of Timer Mode Control Register 4 (TMC4) ...........................................................................
Format of Prescaler Mode Register 4 (PRM4)..................................................................................
Basic Operation of Timer Register 4 (TM4).......................................................................................
TM4 Clear Operation by Match with Compare Register (CM40, CM41) .........................................
Clear Operation of TM4 When CE4 Bit is Cleared (0) ......................................................................
Compare Operation (timer 4) .............................................................................................................
TM4 Clearance after Match Detection ...............................................................................................
Timing of Interval Timer Operation (1) ...............................................................................................
Set Contents of Control Registers for Interval Timer Operation (1) .................................................
Setting Procedure of Interval Timer Operation (1) ............................................................................
Interrupt Request Processing of Interval Timer Operation (1)..........................................................
Timing of Interval Timer Operation (2) ...............................................................................................
Set Contents of Control Register for Interval Timer Operation (2)...................................................
Setting Procedure of Interval Timer Operation (2) ............................................................................
Operation When Count Starts ............................................................................................................
Operation When Compare Register (CM40, CM41) Is Set to 0000H ..............................................
278
280
281
283
284
285
287
287
288
289
290
290
291
292
292
293
294
12-1
12-2
Block Diagram of Watchdog Timer.....................................................................................................
Format of Watchdog Timer Mode Register (WDM) ...........................................................................
295
297
13-1
13-2
13-3
13-4
13-5
13-6
13-7
13-8
13-9
13-10
13-11
Block Diagram of A/D Converter ........................................................................................................
Example of Capacitor Connection on A/D Converter Pins ...............................................................
Format of A/D Converter Mode Register (ADM) ...............................................................................
Word Access to A/D Conversion Result Register..............................................................................
Byte Access to A/D Conversion Result Register...............................................................................
Basic Operation of A/D Converter......................................................................................................
Relationship Between Analog Input Voltage and A/D Conversion Result........................................
Operating Timing in Select Mode (1-buffer mode) ............................................................................
Operation Timing in Select Mode (4-buffer mode) ............................................................................
Operation Timing in Scan Mode .........................................................................................................
A/D Conversion in Select Mode (1-buffer mode) Started by Software ............................................
302
303
306
308
309
311
312
314
316
317
318
LIST OF FIGURES (5/8)
Figure No.
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