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CHAPTER 3 CPU ARCHITECTURE
Table 3-6. Special Function Registers (SFRs) List (5/5)
Address
Note 1
Special Function Register (SFR) Name
Symbol
R/W
Bit Units for Manipulation
On Reset
1 bit
8 bits
16 bits
0FFE6H
Interrupt control register (INTP3)
PIC3
R/W
–
43H
0FFE7H
Interrupt control register (INTP4)
PIC4
–
0FFE8H
Interrupt control register (INTP5)
PIC5
–
0FFE9H
Interrupt control register (INTP6)
PIC6
–
0FFEAH
Interrupt control register (INTCM10)
CMIC10
–
0FFEBH
Interrupt control register (INTCM11)
CMIC11
–
0FFECH
Interrupt control register (INTCM20)
CMIC20
–
0FFEDH
Interrupt control register (INTCM21)
CMIC21
–
0FFEEH
Interrupt control register (INTCM30)
CMIC30
–
0FFEFH
Interrupt control register (INTCM31)
CMIC31
–
0FFF0H
Interrupt control register (INTCM40)
CMIC40
–
0FFF1H
Interrupt control register (INTCM41)
CMIC41
–
0FFF2H
Interrupt control register (INTSER)
SERIC
–
0FFF3H
Interrupt control register (INTSR)
SRIC
–
Interrupt control register (INTCSI1)
CSIIC1
–
0FFF4H
Interrupt control register (INTST)
STIC
–
0FFF5H
Interrupt control register (INTSER2)
SERIC2
–
0FFF6H
Interrupt control register (INTSR2)
SRIC2
–
Interrupt control register (INTCSI2)
CSIIC2
–
0FFF7H
Interrupt control register (INTST2)
STIC2
–
0FFF8H
Interrupt control register (INTAD)
ADIC
–
0FFFCH
Internal memory size select register
Note 2
IMS
–
–
Note 3
Notes 1.
When the LOCATION 0 instruction is executed. Add “F0000H” to this value when the LOCATION 0FH
instruction is executed.
2.
Writing to IMS is valid only with the flash memory model (
m
PD78F4046). When writing to IMS with mask
ROM models (
m
PD784044, 784046), the value is not changed and remains the same as the value on reset.
3.
The value on reset differs depending on the models.
m
PD784044
: CDH
m
PD784046, 78F4046 : DEH