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CHAPTER 10 TIMERS/COUNTERS 2 AND 3
(3) Rewriting compare register (CM20, CM21) to which pulse cycle is set
If the value of CM2n (n = 0, 1) (the compare register to which a pulse cycle has been set) is less than the value of
timer register 2 (TM2) when the value of CM2n is changed to a value less than the current value, the PPG cycle
is extended to the time during which TM2 completes its full count.
An example where the pulse cycle is set by CM21 and pulse width is set by CM20 is given below. At this time, the
output level is inactive until TM2 overflows if the value of CM21 is rewritten after the value of compare register (CM20)
has matched with that of TM2, and then the normal PPG output is performed. If CM21 is rewritten before CM20
and TM2 match, the active level will be output until CM20 and TM2 match. If CM20 and TM2 match before TM2
overflows and becomes 0, the inactive level is output at that point. When TM2 overflows and becomes 0, the active
level will be output, and normal PPG output will be restored.
CM21 rewriting should be performed by the interrupt due to a match between TM2 and CM21, etc.
Figure 10-22. Example of Extended PPG Output Cycle
Remark
ALV20 = 1
Caution If the PPG cycle is extremely short as compared with the time required to acknowledge an interrupt,
the value of CM2n cannot be rewritten by interrupt processing that is performed on match between
timer register 2 (TM2) and compare register (CM2n: n = 0, 1). Use another method (for example,
to poll the interrupt request flags by software with all the interrupts masked).
CM20
TO20
TM2
Count Value
0H
n3
n4
n2
TO20 becomes inactive level when
CM20 and TM2 match, otherwise
it remains at the active level.
Full Count Value
n4
n2
n3
n1
n2
CM21
n5
n3
n1
n1
n1
When value n2 smaller than the TM2
value n5 is written to CM21 here, the
PPG cycle is extended.
FFFFH