參數(shù)資料
型號: 256MBDDRSDRAM
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: DDR SDRAM Specification Version 0.3
中文描述: DDR SDRAM的規(guī)格版本0.3
文件頁數(shù): 31/51頁
文件大?。?/td> 658K
代理商: 256MBDDRSDRAM
- 31 -
REV. 0.3 November 2. 2000
256Mb DDR SDRAM
Preliminary
3.3.14 Power down
CKE
Precharge
Active
Active
power
down
Exit
Read
Active
power
down
Entry
power
down
Entry
Precharge
Command
CK
CK
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit tree are gated off to reduce
power consumption. All banks should be in idle state prior to entering the precharge power down mode and
CKE should be set high at least 1tck+tIS prior to row active command . During power down mode, refresh
operations cannot be performed, therefore the device cannot be remained in power down mode longer than
the refresh period(Data retension time) of the device.
Figure 23. Power down entry and exit timing
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