iii
LED CONTROLS ................................ ................................ ................................ ......................... 200
PULSE WIDTH MODULATORS ................................ ................................ ................................ ..201
REAL TIME CLOCK CMOS ACCESS ................................ ................................ ........................ 202
8051 CONTROLLED PARALLEL PORT ................................ ................................ .................... 204
8051 CONTROLLED IR PORT ................................ ................................ ................................ ....207
GENERAL PURPOSE I/O (GPIO) ................................ ................................ ............................... 208
MULTIPLEXED PINS ................................ ................................ ................................ ................... 214
REAL TIME CLOCK ................................ ................................ ................................ ..................... 222
VCC1 POR ................................ ................................ ................................ ................................ ....224
INTERNAL REGISTERS: ................................ ................................ ................................ ............225
TIME CALENDAR AND ALARM ................................ ................................ ................................ .226
UPDATE CYCLE ................................ ................................ ................................ .......................... 228
CONTROL AND STATUS REGISTERS ................................ ................................ ..................... 229
INTERRUPTS ................................ ................................ ................................ ............................... 233
FREQUENCY DIVIDER ................................ ................................ ................................ ................233
PERIODIC INTERRUPT SELECTION ................................ ................................ ......................... 233
POWER MANAGEMENT ................................ ................................ ................................ .............234
ACCESS BUS ................................ ................................ ................................ .............................. 236
BACKGROUND ................................ ................................ ................................ ............................ 236
REGISTER DESCRIPTION ................................ ................................ ................................ ..........236
PS/2 DEVICE INTERFACE ................................ ................................ ................................ ..........242
PS/2 LOGIC OVERVIEW ................................ ................................ ................................ .............242