參數(shù)資料
型號(hào)： 82845Mx
廠商： Intel Corp.
英文描述： Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)
中文描述： 英特爾845系列芯片組的手機(jī)82845MP/82845MZ芯片組內(nèi)存控制器中樞移動(dòng)（婦幼保健米）
文件頁(yè)數(shù)： 28/157頁(yè)
文件大小： 1407K
代理商： 82845MX
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Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
28
Datasheet
250687-002
R
Signal Name
Type
Description
G_STOP#
I/O
s/t/s
AGP
G_STOP#:
Stop
During PIPE# and SBA Operation:
This signal is not used during PIPE# or SBA
operation.
During FRAME# Operation:
G_STOP# is an input when the MCH-M acts as a
FRAME#-based AGP initiator and is an output when the MCH-M acts as a
FRAME#-based AGP target. G_STOP# is used for disconnect, retry, and abort
sequences on the AGP interface
G_DEVSEL#
I/O
s/t/s
AGP
G_ DEVSEL#:
Device Select
During PIPE# and SBA Operation:
This signal is not used during PIPE# or SBA
operation.
During FRAME# Operation:
G_DEVSEL#, when asserted, indicates that a
FRAME#-based AGP target device has decoded its address as the target of the
current access. The MCH-M asserts G_DEVSEL# based on the SDRAM address
range being accessed by a PCI initiator. As an input, G_DEVSEL# indicates
whether the AGP master has recognized a PCI cycle to it.
G_REQ#
I
AGP
G_REQ#:
Request
During SBA Operation:
This signal is not used during SBA operation.
During PIPE# and FRAME# Operation:
G_REQ#, when asserted, indicates that
the AGP master is requesting use of the AGP interface to run a FRAME#- or
PIPE#-based operation.
G_GNT#
O
AGP
G_GNT#:
Grant
During SBA, PIPE# and FRAME# Operation:
G_GNT#, along with the
information on the ST[2:0] signals (status bus), indicates how the AGP interface will
be used next. Refer to the
AGP Interface Specification, Revision 2.0
for further
explanation of the ST[2:0] values and their meanings.
G_AD[31:0]
I/O
AGP
G_AD[31:0]:
Address/Data Bus
During PIPE# and FRAME# Operation:
The G_AD[31:0] signals are used to
transfer both address and data information on the AGP interface.
During SBA Operation:
The G_AD[31:0] signals are used to transfer data on the
AGP interface.
G_CBE[3:0]#
I/O
AGP
Command/Byte Enable
During FRAME# Operation:
During the address phase of a transaction, the
G_CBE[3:0]# signals define the bus command. During the data phase, the
G_CBE[3:0]# signals are used as byte enables. The byte enables determine which
byte lanes carry meaningful data. The commands issued on the G_CBE# signals
during FRAME#-based AGP transactions are the same G_CBE# command
described in the PCI 2.2 specification.
During PIPE# Operation:
When an address is enqueued using PIPE#, the C/BE#
signals carry command information. Refer to the
AGP 2.0 Interface Specification,
Revision 2.0
for the definition of these commands. The command encoding used
during PIPE#-based AGP is
different
than the command encoding used during
FRAME#-based AGP cycles (or standard PCI cycles on a PCI bus).
During SBA Operation:
These signals are not used during SBA operation.
相關(guān)PDF資料
PDF描述
82845MZ Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)
82845PE 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)
82845GE 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)
8284A Clock Generator and Driver for 8066, 8088 Processors
8284A-1 Clock Generator and Driver for 8066, 8088 Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
82845MZ 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)
82845PE 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)
8284611SM 制造商:Thomas & Betts 功能描述:
828461-2 制造商:TE Connectivity 功能描述:19P CPC STECK-GEH - Bulk
828462-1 制造商:TE Connectivity 功能描述:19P CPC AUFNAHMEGEH - Bulk
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