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參數(shù)資料
| 型號： | 82C205 |
| 英文描述： | Consumer IC |
| 中文描述： | 消費性IC |
| 文件頁數(shù)： | 25/47頁 |
| 文件大?。?/td> | 460K |
| 代理商： | 82C205 |
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Advance Information
82C205
912-1000-024
Revision 1.0
Page 21
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Index 1Dh
Sequencer Control (R/W)
Default = 20h
Reserved
Reserved
Arbiter Client
Acknowledge
Overlap:
This bit should be
set to 1 (default)
for optimal
memory
performance. It
allows for greater
throughput for
internal client
requests.
Reserved
Reserved
Reserved
Reserved
Reserved
Index 1Eh
Refresh Rate Control (R/W)
Default = FFh
Number of reference clock cycles between refresh requests (f = 14.318Mhz, T = 70ns).
The duration between refresh requests should be 1/3 of the maximum refresh interval for a row.
Low Byte
Index 1Fh
Default = FFh
High Byte
Index 20h - 21h
Reserved
Default = 00h
Index 22h
SDRAM Control 0 (R/W)
Default = 00h
Reserved
Reserved
Reserved
Reserved
CAS
Latency = 3:
0: Disable
1: Enable
SDRAM Burst
Type:
0: Sequential
1: Interleave
SDRAM Burst Length:
00: Burst Length = 1
01: Burst Length = 2
10: Burst Length = 4
11: Burst Length = 8
Index 23h
Reserved
Default = 00h
Index 24h
CLUT Base Address (R/W)
Default = 01h
Reserved
Reserved
Color Look Up Table Base Address.
This 6-bit value corresponds to bits [13:8] of the micro-controller address.
Default = 1
(REGBASE should NOT be strapped to '1'.)
Index 25h
TV Weave Mode (R/W)
Default = 00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
TV Weave
Mode
Capture
Pitch
Adjust:
0: Enable
1: Disable
(See note
below.)
Note
: If set to '1', adjusts the Capture Pitch to twice the Video Pitch if selected in order to accommodate TV Weave mode. TV Weave mode
captures both fields of the TV image in an interleaved manner. (Sets Capture Pitch = 2 * Video Pitch.)
Index 26h
CPU Memory Read Buffer (R)
Default = 00h
CPU Memory Read Buffer Status
This register latches the CPU read data from memory and can be used by the microcontroller to perform a "double read".
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