Advance Information
82C205
912-1000-024
Revision 1.0
Page 29
7
6
5
4
3
2
1
0
Index 76h
Active Video Bottom Edge (R)
Default = 00h
The line number of the last line which contains active VGA data after Vertical Sync.
Low Byte
Index 77h
Active Video Bottom Edge (R)
Default = 00h
Reserved
Reserved
Reserved
Reserved
High Byte
Index 78h
Active Video Left Edge (R)
Default = 00h
The first horizontal position that contains active VGA data after Horizontal Sync.
Low Byte
Index 79h
Active Video Left Edge (R)
Default = 00h
Reserved
Reserved
Reserved
High Byte
Index 7Ah
Active Video Right Edge (R)
Default = 00h
The last horizontal position that contains active VGA data after Horizontal Sync.
Low Byte
Index 7Bh
Active Video Right Edge (R)
Default = 00h
Reserved
Reserved
Reserved
High Byte
5.11. TV Decoder Interface Registers
7
6
5
4
3
2
1
0
Index 7Ch
TV Mode (R/W)
Default = 00h
Reserved
Reserved
Reserved
Reserved
Phase Counter Offset:
These bits are used to adjust
the lumninance and
chrominance phase offset.
NTSC
Decoder data
bus width:
0: 16-bit
(default)
1: 8-bit
Input Mode:
0: VGA or test
pattern
input
(default)
1: TV input
Index 7Dh
TV Sync Polarity Adjustment (R/W)
Default = 00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Odd/Even Flag
Polarity:
0: Positive
(typical)
1: Negative
HREF polarity:
0: Positive
1: Negative
(typical)