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參數(shù)資料
| 型號(hào)： | 91C100FDREVB |
| 廠(chǎng)商： | SMSC Corporation |
| 英文描述： | FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY |
| 中文描述： | 宴快速以太網(wǎng)控制器以全雙工能力 |
| 文件頁(yè)數(shù)： | 30/68頁(yè) |
| 文件大小： | 423K |
| 代理商： | 91C100FDREVB |
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SMSC DS – LAN91C100FD REV. B
Page 36
Rev. 05/31/2000
nRXDISC PIN COUNTER - 8-bit counter increments when a packet is discarded due to the nRXDISC pin being active.
This counter will be reset to 00 when read. A count of FF will set the RX_DISC INT. The count will wrap around to 00 after
FF.
RCV DISCRD - Set to discard a packet being received. Will discard packets only in the process of being received. When
set prior to the end of receive packet, bit 4 (RXOVRN) of the interrupt status register will be set to indicate that the packet
was discarded. Otherwise, the packet will be received normally and bit 0 set (RCVINT) in the interrupt status register. RCV
DISCRD is self clearing.
ERCV THRESHOLD - Threshold for ERCV interrupt. Specified in 64 byte multiples. Whenever the number of bytes written
in memory for the presently received packet exceeds the ERCV THRESHOLD, ERCV INT bit of the INTERRUPT STATUS
REGISTER is set.
BANK7
OFFSET
NAME
TYPE
SYMBOL
0 THROUGH 7
EXTERNAL REGISTERS
nCSOUT is driven low by the LAN91C100FD when a valid access to the EXTERNAL REGISTER range occurs.
HIGH
BYTE
EXTERNAL R/W REGISTER
LOW
BYTE
EXTERNAL R/W REGISTER
CYCLE
nCSOUT
LAN91C100FD DATA BUS
AEN=0
A3=0
A4-15 matches I/O BASE
BANK SELECT = 7
Driven low. Transparently latched on
nADS rising edge.
Ignored on writes.
Tri-stated on reads.
BANK SELECT = 4,5,6
High
Ignore cycle.
Otherwise
High
Normal LAN91C100FD cycle.
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