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參數(shù)資料
| 型號： | 935167440557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-318-1, QFP-80 |
| 文件頁數(shù)： | 68/112頁 |
| 文件大?。?/td> | 707K |
| 代理商： | 935167440557 |
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1996 Jun 27
59
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xCE598
Fig.20 Error Frame.
handbook, full pagewidth
MGA165
DATA FRAME
ERROR FRAME
INTER-FRAME SPACE
or OVERLOAD FRAME
ERROR DELIMITER
superimposing of
ERROR FLAGs
1 ERROR
FLAG
13.6.5
OVERLOAD FRAME
The Overload Frame consists of two fields:
The Overload Flag
The Overload Delimiter.
The transmission of an Overload Frame may only start:
Condition 1; during the first bit period of an expected
Intermission Field.
Condition 2; one bit period after detecting the dominant
bit during Intermission Field.
The P8xCE598's on-chip CAN-controller will never initiate
transmission of a condition 1 Overload Frame and will only
react on a transmitted condition 2 Overload Frame,
according to the CAN-protocol. No more than two
Overload Frames are generated to delay a Data Frame or
a Remote Frame. Although the overall form of the
Overload Frame corresponds to that of the Error Frame,
an Overload Frame does not initiate or require the
retransmission of the preceding frame.
13.6.5.1
Overload Flag
The Overload Flag consists of six dominant bits and has a
similar format to the Error Flag.
There are two conditions in the CAN-protocol which lead
to the transmission of an Overload Flag:
Condition 1; receiver circuitry requires more time to
process the current data before receiving the next frame
(receiver not ready).
Condition 2; detection of a dominant bit during
Intermission Field (see Section 13.6.6).
The Overload Flag's form corrupts the fixed form of the
Intermission Field. All other CAN-controllers detecting the
overload condition also transmit an Overload Flag
(condition 2).
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