參數(shù)資料
型號： 9880
廠商： Intel Corp.
英文描述： Advanced 10/100 Repeater with Intergrated Management
中文描述： 高級10/100中繼器與綜合管理
文件頁數(shù)： 112/118頁
文件大?。?/td> 1648K
代理商： 9880
LXT9860/9880
—
Advanced 10/100 Repeater with Integrated Management
112
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
6.8.5
LED Timer Control Register
The upper 8 bits serves as a register for programming the slow blink frequency of the LEDs. The
lower 8 bits program the fast LED blink rate. In both registers, the maximum blink frequency is
128 Hz while the minimum frequency is 0.5 Hz.
The slow LED blink rate only applies to LED Mode 2, while the fast LED blink rate is applicable
to all LED schemes.
Table 80. LED Configuration
Bit
Name
Description
Type
1
Default
31:20
Reserved
Reserved
R/W
0s
19:18
MII2LED
See
Table 81
for Bit Definitions.
R/W
10
17:16
MII1LED
R/W
10
15:14
PortLED7
R/W
10
13:12
PortLED6
R/W
10
11:10
PortLED5
R/W
10
9:8
PortLED4
R/W
10
7:6
PortLED3
R/W
10
5:4
PortLED2
R/W
10
3:2
PortLED1
R/W
10
1:0
PortLED0
R/W
10
1. R = Read only; W = Write only, R/W = Read/Write, LH = Latch High, LL = Latch Low, SC = Self Clearing
2. During reset, the state of this register is all 1s. If a manager is present within the system, this register stays
in the all 1s state following reset. Otherwise, they default to hardware control (10).
Table 81. Port LED1, 2, 3 Control Encodings
Port
Conf.
Bits
Port LED1
Port LED2
Port LED 3
Modes 1,
3 and 4
Function
Mode 2
Function
Modes 1 and 4
Function
Modes 2 and
3 Function
Modes 1, 3, 4
Mode 2
00
LED off
LED off
Hardware
control
LED Off
LED Off
01
Reserved
LED fast blink
Reserved
Hardware control
10
Hardware control
Hardware control
Hardware control
11
LED off
LED on
LED off
LED Off
Table 82. LED Timer Control Register Bit Assignments
31:16
15:8
7:0
Reserved
Slow Blink Frequency
Default is xCC, 1.6 s
Fast Blink Frequency
Default is x32, 0.4 s
Period = 7.8125 ms x (Register Value + 1)
Frequency = 1
7.8125 ms x (Register Value + 1)
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