參數(shù)資料
型號: 9880
廠商: Intel Corp.
英文描述: Advanced 10/100 Repeater with Intergrated Management
中文描述: 高級10/100中繼器與綜合管理
文件頁數(shù): 60/118頁
文件大?。?/td> 1648K
代理商: 9880
LXT9860/9880
Advanced 10/100 Repeater with Integrated Management
60
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
3.12
Serial Configuration Interface
The Serial Configuration Interface allows the user to load system-specific information (board type,
plug-in cards, status, etc.) into the Repeater Configuration Register (see
Table 75 on page 109
).
This register may be read remotely through the Serial Management Interface (SMI). The Serial
Configuration Interface mode (Repeater Configuration Register bit 14 = 1) allows the collection of
up to 8 bits of board data, compared to the CONFIG[1:0] 2-bit mode (bit 14 = 0). See
Table 75 on
page 109
.
For Serial Configuration Interface mode = 1, an external
165 device is used to perform a parallel-
to-serial conversion of the board data (see
Figure 17
). These board data bits are shifted into the
LXT98x0 each time the Repeater Serial Configuration register is read. CFG_DT is clocked into the
LXT98x0 relative to the rising edge of CFG_CLK as shown in
Figure 18
. Also note the register bit
positions versus the
165 parallel input positions.
The CFG_CLK pin is shared with LED_CLK. For reading the Repeater Serial Configuration
Register, the configuration bits are reloaded into the LXT98x0. The shared functionality of the
clock (configuration and serial LED), causes an unscheduled serial LED update. All 32 clock
cycles occur with only the first 8 bits clocked into the Repeater Serial Configuration Register. See
Table 76 on page 110
.
Figure 16. Optional R/W Serial PROM Interface
CLK
DTOUT
The LXT98x0 drives outgoing data on the falling clock edge.
The LXT98x0 samples incoming data on the rising clock edge
.
CS
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