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參數(shù)資料
| 型號： | 9880 |
| 廠商： | Intel Corp. |
| 英文描述： | Advanced 10/100 Repeater with Intergrated Management |
| 中文描述： | 高級10/100中繼器與綜合管理 |
| 文件頁數(shù)： | 23/118頁 |
| 文件大?。?/td> | 1648K |
| 代理商： | 9880 |
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Advanced 10/100 Repeater with Integrated Management
—
LXT9860/9880
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
23
43
44
45
48
49
IR100DAT0
IR100DAT1
IR100DAT2
IR100DAT3
IR100DAT4
I/O
Tri-state
Schmitt
PU
100 Mbps IRB Data.
These bidirectional signals carry 5-bit data
on the 100 Mbps IRB. Data is driven on the falling edge and
sampled on the rising edge of IR100CLK. Buffer these signals
between boards.
50
IR100CLK
I/O
Tri-state
Schmitt
PD
100 Mbps IRB Clock.
This bidirectional, non-continuous, 25 MHz
clock is recovered from received network traffic. Schmitt triggering
is used to increase noise immunity. This signal must be pulled to
VCC when idle. One 1 k
pull-up resistor on both sides of a
74LVT245 buffer is recommended.
56
IR100ISO
O
100 Mbps Stack Backplane Isolate.
This output allows one
LXT98x0 per board the ability to enable or disable an external
bidirectional transceiver (74LVT245). Attach the output to the
Enable input of the 74LVT245. The output is driven High (disable)
to isolate the 100 Mbps IRB.
10 Mbps IRB Signals
11
IR10DAT
I/O
OD
PD
10 Mbps IRB Data.
This bidirectional signal carries data on the
10 Mbps IRB. Data is driven and sampled on the rising edge of
the corresponding IRCLK. This signal must be pulled High by a
330
resistor. Buffer this signal between boards.
12
IR10CLK
I/O
Tri-state
Schmitt
PD
10 Mbps10 Mbps IRB Clock.
This bidirectional, non-continuous,
10 MHz clock is recovered from received network traffic. During
idle periods, the output is high-impedance. Schmitt triggering is
used to increase noise immunity.
6
IR10DEN
O
OD
10 Mbps IRB Driver Enable.
This output provides directional
control for an external bidirectional transceiver (74LVT245) used
to buffer the IRBs in multi-board applications. It must be pulled up
by a 330
resistor. When there are multiple devices on one
board, tie all IR10DEN outputs together. If IR10DEN is tied
directly to the DIR pin on a 74LVT245, attach the on-board
IR10DAT, IR10CLK and IR10ENA signals to the
“
B
”
side of the
74LVT245, and connect the off-board signals to the
“
A
”
side of the
74LVT245.
10
IR10ENA
I/O
OD
PU
10 Mbps IRB Enable.
This active Low output indicates carrier
presence on the IRB. A 330
pull-up resistor is required to pull
the IR10ENA output High when the IRB is idle. When there are
multiple devices, tie all IR10ENA outputs together. Buffer these
signals between boards.
3
IR10COL
I/O
OD
PU
10 Mbps IRB Collision.
This output is driven Low to indicate a
collision occurred on the 10 Mbps segment. A 330
resistor is
required on each board to pull this signal High when there is no
collision. Do not connect between boards and do not buffer.
Table 5. Inter-Repeater Backplane Signal Descriptions (Continued)
Pin
Symbol
Type
1, 2
Description
1. I = Input, O = Output, I/O = Input/Output, D = Digital, AI = Analog Input, A I/O = Analog Input/Output,
OD = Open Drain, OS = Open Source, PD = Pull Down, PU = Pull Up. Even if the IRB is not used, required
pull-up resistors must be installed as listed above.
NC = No Clamp. Pad does not clamp input in the absence of power.
2. Pins are 5V tolerant, unless indicated.
3. IR100CFS is
not
5V tolerant.
4. IR10CFS is
not
5V tolerant.
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