![](http://datasheet.mmic.net.cn/230000/9S12E128DGV1_datasheet_15574439/9S12E128DGV1_109.png)
109
NOTE:
Instead of specifying ambient temperature all parameters are specified for the more
meaningful silicon junction temperature. For power dissipation calculations refer
to
Section A.1.8 Power Dissipation and Thermal Characteristics
.
A.1.8 Power Dissipation and Thermal Characteristics
Power dissipation and thermal characteristics are closely related. The user must assure that the maximum
operating junction temperature is not exceeded. The average chip-junction temperature (T
J
) in
°
C can be
obtained from:
The total power dissipation can be calculated from:
Two cases with internal voltage regulator enabled and disabled must be considered:
Table A-4 Operating Conditions
Rating
Symbol
Min
Typ
Max
Unit
I/O, Regulator and Analog Supply Voltage
V
DD5
3.135
3.3/5
5.5
V
Internal Logic Supply Voltage
1
NOTES
:
1. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The
given operating range applies when this regulator is disabled and the device is powered from an external source.
2. Some blocks e.g. ATD (conversion) and NVMs (program/erase) require higher bus frequencies for proper opera-
tion.
V
DD
2.35
2.5
2.75
V
PLL Supply Voltage
(1)
V
DDPLL
2.35
2.5
2.75
V
Voltage Difference VDDX to VDDA
VDDX
-0.1
0
0.1
V
Voltage Difference VSSX to VSSR and VSSA
VSSX
-0.1
0
0.1
V
Oscillator
f
osc
0.5
-
16
MHz
Bus Frequency
2
f
bus
0.25
-
25
MHz
Operating Junction Temperature Range
T
J
-40
-
140
°
C
TJ
TA
PD
Θ
JA
(
)
+
=
TJ
Junction Temperature, [
°
C
]
=
TA
Ambient Temperature, [
°
C
]
=
PD
Θ
JA
Total Chip Power Dissipation, [W]
=
Package Thermal Resistance, [
°
C/W]
=
PD
PINT
PIO
+
=
PINT
Chip Internal Power Dissipation, [W]
=
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.