參數(shù)資料
型號(hào)： 9S12E128DGV1
廠商： Motorola, Inc.
英文描述： MC9S12E-Family Device User Guide V01.04
中文描述： MC9S12E -系列設(shè)備的用戶手冊(cè)V01.04
文件頁數(shù)： 90/156頁
文件大?。?/td> 3077K
代理商： 9S12E128DGV1
Device User Guide — 9S12E128DGV1/D V01.04
90
Table 2-2 MC9S12E-Family Power and Ground Connection Summary
Nominal
Voltage
NOTE:
All VSS pins must be connected together in the application. Because fast signal
transitions place high, short-duration current demands on the power supply, use
bypass capacitors with high-frequency characteristics and place them as close to
the MCU as possible. Bypass requirements depend on MCU pin load.
Mnemonic
Description
VDD1
VDD2
2.5 V
Internal power and ground generated by internal regulator. These also
allow an external source to supply the core VDD/VSS voltages and
bypass the internal voltage regulator.
VSS1
VSS2
0V
VDDR
3.3/5.0 V
External power and ground, supply to internal voltage regulator.
To disable voltage regulator attach V
DDR
to V
SSR
.
VSSR
0 V
VDDX
3.3/5.0 V
External power and ground, supply to pin drivers.
VSSX
0 V
VDDA
3.3/5.0 V
Operating voltage and ground for the analog-to-digital converter, the
reference for the internal voltage regulator and the digital-to-analog
converters, allows the supply voltage to the A/D to be bypassed
independently.
VSSA
0 V
VRH
3.3/5.0 V
Reference voltage high for the ATD converter, and DAC.
VRL
0 V
Reference voltage low for the ATD converter.
VDDPLL
2.5 V
Provides operating voltage and ground for the Phased-Locked Loop.
This allows the supply voltage to the PLL to be bypassed
independently. Internal power and ground generated by internal
regulator.
VSSPLL
0 V
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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