5-2 Revision 11 Revision 9 (continued) The reference to guidelines for global spines and VersaTile rows, given in the "" />
參數(shù)資料
型號(hào): A3PN250-ZVQG100
廠商: Microsemi SoC
文件頁(yè)數(shù): 11/114頁(yè)
文件大?。?/td> 0K
描述: IC FPGA NANO 250K GATES 100-VQFP
標(biāo)準(zhǔn)包裝: 90
系列: ProASIC3 nano
RAM 位總計(jì): 36864
輸入/輸出數(shù): 68
門(mén)數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)當(dāng)前第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
Datasheet Information
5-2
Revision 11
Revision 9
(continued)
The reference to guidelines for global spines and VersaTile rows, given in the "Global
he "Spine Architecture"
section of the Global Resources chapter in the IProASIC3 nano FPGA Fabric
(SAR 34736).
Figure 2-3 has been modified for the DIN waveform; the Rise and Fall time label has
been changed to tDIN (37114).
The notes regarding drive strength in the "Summary of I/O Timing Characteristics –
tables were revised for clarification. They now state that the minimum drive strength
for the default software configuration when run in wide range is ±100 A. The drive
strength displayed in software is supported in normal range only. For a detailed I/V
curve, refer to the IBIS models (SAR 34759).
The AC Loading figures in the "Single-Ended I/O Characteristics" section were
Added values for minimum pulse width and removed the FRMAX row from Table 2-67
software to determine the FRMAX for the device you are using (SAR 36956).
through
indicating that when the CCC/PLL core is generated by Microsemi core generator
software, not all delay values of the specified delay increments are available (SAR
34823).
The port names in the SRAM "Timing Waveforms", SRAM "Timing Characteristics"
tables, Figure 2-34 FIFO Reset, and the FIFO "Timing Characteristics" tables were
revised to ensure consistency with the software names (SAR 35743).
Reference was made to a new application note, Simultaneous Read-Write Operations
detail (SAR 34871).
The "Pin Descriptions and Packaging" chapter has been added (SAR 34772).
July 2010
The versioning system for datasheets has been changed. Datasheets are assigned a
revision number that increments each time the datasheet is revised. The "ProASIC3
nano Device Status" table on page II indicates the status for each device in the device
family.
N/A
Revision 8
(April 2010)
References to differential inputs were removed from the datasheet, since ProASIC3
nano devices do not support differential inputs (SAR 21449).
N/A
The JTAG DC voltage was revised in Table 2-2 Recommended Operating
Conditions 1, 2 (SAR 24052). The maximum value for VPUMP programming voltage
(operation mode) was changed from 3.45 V to 3.6 V (SAR 25220).
Timing Delays was changed to 100C.
The typical value for A3PN010 was revised in Table 2-7 Quiescent Supply Current
Characteristics. The note was revised to remove the statement that values do not
include I/O static contribution.
Revision
Changes
Page
相關(guān)PDF資料
PDF描述
A3PN250-ZVQ100 IC FPGA NANO 250K GATES 100-VQFP
BR93L46F-WE2 IC EEPROM 1KBIT 2MHZ 8SOP
AGLN030V2-ZCSG81I IC FPGA NANO 1KB 30K 81-CSP
A3P125-1VQ100 IC FPGA 1KB FLASH 125K 100-VQFP
A3P125-1VQG100 IC FPGA 1KB FLASH 125K 100-VQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A3PN250-ZVQG100I 功能描述:IC FPGA NANO 250K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門(mén)數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
A3PT5012 制造商:OMRON AUTOMATION AND SAFETY 功能描述:2 SPLIT SCREEN HORZ 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:Heavy Duty Switches L.P.B.
A3PT-5012 功能描述:按鈕開(kāi)關(guān) L.P.B. RoHS:否 制造商:C&K Components 觸點(diǎn)形式:2 NC - 2 NO 開(kāi)關(guān)功能:ON ? OFF 電流額定值:4 A 電壓額定值 AC:12 V to 250 V 電壓額定值 DC:12 V to 50 V 功率額定值: 安裝風(fēng)格:Through Hole 照明:Illuminated 照明顏色:None IP 等級(jí):IP 40 端接類型:Solder 觸點(diǎn)電鍍:Silver 執(zhí)行器:Square 蓋顏色: 封裝: 可燃性等級(jí):UL 94 V-0
A3PT70402 制造商:OMRON AUTOMATION AND SAFETY 功能描述:SWITCH UNIT 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:Switch Push Button Round Button 5A 250VAC 250VDC Alternate Contact Quick Connect/Solder Panel Mount
A3PT-7040-2 功能描述:按鈕開(kāi)關(guān) L.P.B. RoHS:否 制造商:C&K Components 觸點(diǎn)形式:2 NC - 2 NO 開(kāi)關(guān)功能:ON ? OFF 電流額定值:4 A 電壓額定值 AC:12 V to 250 V 電壓額定值 DC:12 V to 50 V 功率額定值: 安裝風(fēng)格:Through Hole 照明:Illuminated 照明顏色:None IP 等級(jí):IP 40 端接類型:Solder 觸點(diǎn)電鍍:Silver 執(zhí)行器:Square 蓋顏色: 封裝: 可燃性等級(jí):UL 94 V-0