參數(shù)資料
型號(hào)： AD6636BC
廠商： Analog Devices, Inc.
元件分類(lèi)： 數(shù)字上／下變頻
英文描述： 150 MSPS Wideband Digital Down-Converter (DDC)
中文描述： 150MSPS的寬帶數(shù)字下變頻器（DDC）
文件頁(yè)數(shù)： 54/72頁(yè)
文件大?。?/td> 1629K
代理商： AD6636BC
AD6636
MEMORY MAP
READING THE MEMORY MAP TABLE
Each row in the memory map table has four address locations.
The memory map is roughly divided into four regions: global
register map (Addresses 0x00 to 0x0B), input port register map
(Addresses 0x0C to 0x67), channel register map (Addresses
0x68 to 0xBB), and output port register map (Addresses 0xBC
to 0xE7). The channel register map is shared by all six channels,
and access to individual channels is given by the channel I/O
access control register (Address 0x02).
Rev. 0 | Page 54 of 72
In the memory map, Table 29, the addresses are given in the
right column. The column with the heading Byte 0 has the
address given in the right column. The column Byte 1 has the
address given by 1 more than the address listed in the right
column (address offset of 1). Similarly, the address offset for the
Byte 2 column is 2, and for the Byte 3 column is 3. For example,
the second row lists 0x04 as the address in the right column.
The pin synchronization configuration register has Address
0x04, the soft synchronization configuration register has
Address 0x05, and the LVDS control register lists Addresses
0x07 and 0x06.
Bit Format
All registers are in little-endian format. For example, if a register
takes 24 bits or three address locations, then the most
significant byte is at the highest address location and the least
significant byte is at a lowest address location. In all registers,
the least significant bit is Bit 0 and the most significant bit is
Bit 7. For example, the NCO frequency <31:0> register is
32 bits wide. Bit 0 (LSB) of this register is written at Bit 0 of
Address 0x70 and Bit 32 (MSB) of this register is written at
Bit 7 of Address 0x73.
When referring to a register that takes up multiple address
locations, it is referred to by the address location of the most
significant byte of the register. For example, the text reads, “Port
A dwell timer at Address 0x2A.” Note that only the four most
significant bits of this register are at this location, and this
register also takes up Addresses 0x29 and 0x28.
Open Locations
All locations marked as open are currently not used. When
required, these locations should be written with 0s. Writing to
these locations is required only when part of an address
location is open (for example, Address 0x78). If the whole
address location is open (for example, Address 0x00), then this
address location does not need to be written. If the open
locations are readback using the microport or serial port, the
readback value is undefined (each bit can be independently 1 or
0), and these bits have no significance.
If an address location has more than one register or has one
register with some open bits, then the order of these registers is
as given in the table. For example, Address 0x33 reads
Open <7:5>, Port A Signal Monitor <4:0>.
The open <7:5> is located at Bits <7:5> and the Port A signal
monitor <4:0> is located at Bits <4:0>.
Another example is Address 0x35:
Open <15:10>, Port A Upper Threshold <9:0>
Here, Bits <7:2> of Address 0x35 are open <15:10>. Bits <1:0>
of Address 0x35 and Bits <7:0> of Address 0x34 make up the
Port A upper threshold <9:0> register (Bit 1 of Address 0x35 is
the MSB of the Port A upper threshold register).
Default Values
On coming out of reset, some of the address locations (but not
all) are loaded with default values. When available, the default
values for the registers are given in the table. If the default value
is not listed, then these address locations are in an undefined
state (Logic 0 or Logic 1) on RESET.
Logic Levels
In the explanation of various registers, “bit is set” is synonymous
with “bit is set to Logic 1” or “writing Logic 1 for the bit.”
Similarly “clear a bit” is synonymous with “bit is set to Logic 0”
or “writing Logic 0 for the bit.”
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD6636BC/PCB 制造商:Analog Devices 功能描述:Evaluation Board For 150MSPS Wideband Digital Down-Converter 制造商:Analog Devices 功能描述:EVALUATION BOARD AD6636 - Bulk
AD6636BC/PCBZ 制造商:Analog Devices 功能描述:Evaluation Kit For 150 MSPS, Wide Band, Digital Down Converter 制造商:Analog Devices 功能描述:EVALUATION BOARD AD6636 - Bulk
AD6636CBC 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD6636CBCZ 功能描述:IC DIGITAL DWNCONV 4CH 256CSPBGA RoHS:是 類(lèi)別:RF/IF 和 RFID >> RF 混頻器 系列:AD6636 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤(pán) 封裝/外殼:12-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3）
AD6636CBCZ1 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC)
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