參數(shù)資料
型號(hào)： AD9517-2A/PCBZ
廠商： Analog Devices Inc
文件頁數(shù)： 68/80頁
文件大小： 0K
描述： BOARD EVALUATION FOR AD9517-2A
設(shè)計(jì)資源： AD9517 Eval Brd Schematics
AD9517 Gerber Files
AD9517-2 BOM
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，時(shí)鐘發(fā)生器
嵌入式： 否
已用 IC / 零件： AD9517-2A
主要屬性： 2 輸入，12 輸出，2.2GHz VCO
次要屬性： CMOS，LVPECL 和 LVDS 兼容
已供物品： 板
AD9517-2
Data Sheet
Rev. E | Page 70 of 80
Table 57. LVDS/CMOS Outputs
Reg.
Addr.
(Hex)
Bits
Name
Description
0x140
[7:5]
OUT4 output polarity
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
6
5
OUT4A (CMOS)
OUT4B (CMOS)
OUT4 (LVDS)
0
Noninverting
Inverting
Noninverting
0
1
0
Noninverting
Noninverting (default)
1
0
Inverting
Noninverting
1
0
Inverting
Noninverting
0
1
Inverting
Noninverting
Inverting
0
1
Inverting
1
0
1
Noninverting
Inverting
1
Noninverting
Inverting
4
OUT4 CMOS B
In CMOS mode, turn on/off the CMOS B output. There is no effect in LVDS mode.
0: turns off the CMOS B output (default).
1: turns on the CMOS B output.
3
OUT4 select LVDS/CMOS
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
[2:1]
OUT4 LVDS output current
Sets output current level in LVDS mode. This has no effect in CMOS mode.
2
1
Current (mA)
Recommended Termination ()
0
1.75
100
0
1
3.5
100 (default)
1
0
5.25
50
1
7
50
0
OUT4 power-down
Powers down output (LVDS/CMOS).
0: power on (default).
1: power off.
0x141
[7:5]
OUT5 output polarity
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
6
5
OUT5A (CMOS)
OUT5B (CMOS)
OUT5 (LVDS)
0
Noninverting
Inverting
Noninverting
0
1
0
Noninverting
Noninverting (default)
1
0
Inverting
Noninverting
1
0
Inverting
Noninverting
0
1
Inverting
Noninverting
Inverting
0
1
Inverting
1
0
1
Noninverting
Inverting
1
Noninverting
Inverting
4
OUT5 CMOS B
In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.
0: turns off the CMOS B output (default).
1: turns on the CMOS B output.
3
OUT5 select LVDS/CMOS
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
[2:1]
OUT5 LVDS output current
Sets output current level in LVDS mode. This has no effect in CMOS mode.
2
1
Current (mA)
Recommended Termination ()
0
1.75
100
0
1
3.5
100 (default)
1
0
5.25
50
1
7
50
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