參數(shù)資料
型號(hào): AD9522-5BCPZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/76頁(yè)
文件大小: 0K
描述: IC CLOCK GEN 2.4GHZ 64LFCSP
標(biāo)準(zhǔn)包裝: 750
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:12,2:24
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.4GHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
AD9522-5
Rev. 0 | Page 13 of 76
PD, SYNC, AND RESET PINS
Table 12.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
INPUT CHARACTERISTICS
Each of these pins has an internal 30 kΩ pull-up resistor
Logic 1 Voltage
2.0
V
Logic 0 Voltage
0.8
V
Logic 1 Current
1
μA
Logic 0 Current
110
μA
The minus sign indicates that current is flowing out of
the AD9522, which is due to the internal pull-up resistor
Capacitance
2
pF
RESET TIMING
Pulse Width Low
50
ns
RESET Inactive to Start of Register Programming
100
ns
SYNC TIMING
Pulse Width Low
1.3
ns
High speed clock is CLK input signal
SERIAL PORT SETUP PINS: SP1, SP0
Table 13.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SP1, SP0
These pins do not have internal pull-up/pull-down resistors
Logic Level 0
0.25 × VS
V
VS is the voltage on the VS pin
Logic Level
0.4 × VS
0.65 × VS
V
User can float these pins to obtain Logic Level ; if floating these pins, user
should connect a capacitor to ground
Logic Level 1
0.8 × VS
V
LD, STATUS, AND REFMON PINS
Table 14.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
OUTPUT CHARACTERISTICS
When selected as a digital output (CMOS); there are other
modes in which these pins are not CMOS digital outputs;
see Table 47, 0x017, 0x01A, and 0x01B
Output Voltage High, VOH
2.7
V
Output Voltage Low, VOL
0.4
V
MAXIMUM TOGGLE RATE
100
MHz
Applies when mux is set to any divider or counter output,
or PFD up/down pulse; also applies in analog lock detect
mode; usually debug mode only; note that spurs can
couple to output when any of these pins are toggling
ANALOG LOCK DETECT
Capacitance
3
pF
On-chip capacitance; used to calculate RC time constant
for analog lock detect readback; use a pull-up resistor
REF1, REF2, AND CLK FREQUENCY STATUS MONITOR
Normal Range
1.02
MHz
Frequency above which the monitor indicates the
presence of the reference
Extended Range
8
kHz
Frequency above which the monitor indicates the
presence of the reference
LD PIN COMPARATOR
Trip Point
1.6
V
Hysteresis
260
mV
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