參數(shù)資料
型號: AD9522-5BCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 9/76頁
文件大?。?/td> 0K
描述: IC CLOCK GEN 2.4GHZ 64LFCSP
標準包裝: 750
類型: 時鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:12,2:24
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.4GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應商設備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
AD9522-5
Rev. 0 | Page 17 of 76
Pin No.
Input/
Output
Pin
Type
Mnemonic
Description
15
I
3.3 V CMOS
CS
Serial Control Port Chip Select; Active Low. This pin has an internal 30 kΩ
pull-up resistor.
16
I
3.3 V CMOS
SCLK/SCL
Serial Control Port Clock Signal. This pin has an internal 30 kΩ pull-down resistor
in SPI mode but is high impedance in IC mode.
17
I/O
3.3 V CMOS
SDIO/SDA
Serial Control Port Bidirectional Serial Data In/Out.
18
O
3.3 V CMOS
SDO
Serial Control Port Unidirectional Serial Data Out.
19, 59
I
GND
Ground Pins.
20
I
Three-level
logic
SP1
Select SPI or IC as the serial interface port and select the IC slave address in IC
mode. Three-level logic. This pin is internally biased for the open logic level.
21
I
Three-level
logic
SP0
Select SPI or IC as the serial interface port and select the IC slave address in IC
mode. Three-level logic. This pin is internally biased for the open logic level.
22
I
3.3 V CMOS
EEPROM
Setting this pin high selects the register values stored in the internal EEPROM to
be loaded at reset and/or power-up. Setting this pin low causes the AD9522 to
load the hard-coded default register values at power-up/reset. This pin has an
internal 30 kΩ pull-down resistor.
23
I
3.3 V CMOS
RESET
Chip Reset, Active Low. This pin has an internal 30 kΩ pull-up resistor.
24
I
3.3 V CMOS
PD
Chip Power-Down, Active Low. This pin has an internal 30 kΩ pull-up resistor.
25
O
LVDS or
CMOS
OUT9 (OUT9A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
26
O
LVDS or
CMOS
OUT9 (OUT9B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
28
O
LVDS or
CMOS
OUT10 (OUT10A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
29
O
LVDS or
CMOS
OUT10 (OUT10B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
30
O
LVDS or
CMOS
OUT11 (OUT11A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
31
O
LVDS or
CMOS
OUT11 (OUT11B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
33
O
LVDS or
CMOS
OUT6 (OUT6A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
34
O
LVDS or
CMOS
OUT6 (OUT6B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
36
O
LVDS or
CMOS
OUT7 (OUT7A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
37
O
LVDS or
CMOS
OUT7 (OUT7B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
38
O
LVDS or
CMOS
OUT8 (OUT8A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
39
O
LVDS or
CMOS
OUT8 (OUT8B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
42
O
LVDS or
CMOS
OUT5 (OUT5B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
43
O
LVDS or
CMOS
OUT5 (OUT5A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
44
O
LVDS or
CMOS
OUT4 (OUT4B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
45
O
LVDS or
CMOS
OUT4 (OUT4A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
相關PDF資料
PDF描述
X9418YP24-2.7 IC XDCP DUAL 64-TAP 2.5K 24-DIP
VI-BTK-MV-S CONVERTER MOD DC/DC 40V 150W
VI-BTJ-MV-S CONVERTER MOD DC/DC 36V 150W
AD9516-5BCPZ-REEL7 IC CLOCK GEN W/PLL 64-LFCSP
V24A24H300BL2 CONVERTER MOD DC/DC 24V 300W
相關代理商/技術參數(shù)
參數(shù)描述
AD9523 制造商:AD 制造商全稱:Analog Devices 功能描述:Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs
AD9523/PCBZ 功能描述:BOARD EVAL FOR AD9523 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信,線路接口單元(LIU) 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板,電源,線纜,CD 其它名稱:82EBV2081
AD9523-1/PCBZ 功能描述:BOARD EVAL FOR AD9523-1 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PSoC® 主要目的:電源管理,熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板,CD,電源
AD9523-1BCPZ 功能描述:IC INTEGER-N CLCK GEN 72LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1 系列:- 類型:時鐘/頻率發(fā)生器,多路復用器 PLL:是 主要目的:存儲器,RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商設備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6
AD9523-1BCPZ-REEL7 功能描述:IC INTEGER-N CLCK GEN 72LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應商設備封裝:64-TSSOP 包裝:管件