參數(shù)資料
型號(hào)： AD9547/PCBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 93/104頁(yè)
文件大小： 0K
描述： BOARD EVALUATION FOR AD9547
設(shè)計(jì)資源： AD9547 Schematic
AD9574 BOM
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，時(shí)鐘發(fā)生器
嵌入式： 否
已用 IC / 零件： AD9547
主要屬性： 2 個(gè)差分式或 4 個(gè)單端輸入
次要屬性： CMOS，LVPECL 和 LVDS 兼容
已供物品： 板
Data Sheet
AD9547
Rev. E | Page 89 of 104
Table 120. Loop Mode
Address
Bit
Bit Name
Description
0x0A01
7
Unused
Unused.
6
User holdover
Force the device into holdover mode.
0 (default) = normal operation.
1 = force device into holdover mode.
The device functions as though all input references are faulted.
5
User free run
Force the device into free-run mode.
0 (default) = normal operation.
1 = force device into free-runmode.
The free-running frequency tuning word register (Address 0x0300 to Address 0x0305)
specifies the DDS output frequency.
Note that, when user free run is set, it overrides user holdover.
[4:3]
User selectionmode
Select the operating mode of the reference switchingstate machine.
00 (default) = automatic mode. The fully automatic priority-basedalgorithm selects the
active reference (Bits[1:0] are ignored).
01 = fallback mode. The active reference is the user reference (Bits[1:0]) as long as it is valid.
Otherwise, use the fully automatic priority-basedalgorithm to select the active reference.
10 = holdover mode. The active reference is the user reference (Bits[1:0]) as long as it is
valid. Otherwise, enter holdover mode.
11 = manual mode. The active reference is always the user reference (Bits[1:0]). When using
manual mode, be sure that the reference declaredas the user reference (Bits[1:0]) is
programmedfor manual reference-to-profile assignment inthe appropriate manual
reference profile selectionregister (Address 0x0503 and Address 0x0506).
2
Unused
Unused. Write a 0 to this bit.
[1:0]
User reference selection
Input reference whenuser selectionmode = 01, 10, or 11.
00 (default) = Input Reference A.
01 = Input Reference AA.
10 = Input Reference B.
11 = Input Reference BB.
Table 121. Cal/Sync
Address
Bit
Bit Name
Description
0x0A02
[7:2]
Unused
Unused.
1
Sync distribution
Setting this bit (default = 0) initiates synchronization of the clock distributionoutput. When
this bit = 1, the clock distribution output stalls.Synchronizationoccurs onthe 1 to 0 transitionof
this bit.
0
Calibrate SYSCLK
A 0 to 1 transition of this bit (default = 0), followed by an IO_UPDATE, initiates an internal
calibrationof the SYSCLK PLL (assuming it is enabled). The calibrationroutine automatically
selects the proper VCO frequency band and signal amplitude. The internal system clock stalls
duringthe calibrationprocedure,disablingthedeviceuntil thecalibrationis complete(a few
milliseconds). Ifthe user wishes to recalibrate the SYSCLK PLL and this bit is already set to 1,
the user must first write a 0 to this bit, issue an IO_UPDATE, write a 1 to this bit, and issue
another IO_UPDATE.
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