參數(shù)資料
型號(hào)： ADV7183AKST
廠(chǎng)商： ANALOG DEVICES INC
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： Multiformat SDTV Video Decoder
中文描述： COLOR SIGNAL DECODER, PQFP80
封裝： LEAD FREE, MS-026-BEC, LQFP-80
文件頁(yè)數(shù)： 26/104頁(yè)
文件大?。?/td> 894K
代理商： ADV7183AKST
ADV7183A
BRI[7:0] Brightness Adjust (SDP), Address 0x0A, [7:0]
This register controls the brightness of the video signal through
the SDP core.
Table 50. BRI Function
BRI[7:0]
Description (Adjust Brightness of the Picture)
0x00*
Offset of the luma channel = 0IRE.
0x7F
Offset of the luma channel = 100IRE.
0xFF
Offset of the luma channel = –100IRE.
*Default value.
Rev. A | Page 26 of 104
HUE[7:0] Hue Adjust (SDP), Address 0x0B, [7:0]
This register contains the value for the color hue adjustment.
HUE[7:0] has a range of ±90°, with 0x00 equivalent to an
adjustment of 0°. The resolution of HUE[7:0] is 1 bit = 0.7°.
The hue adjustment value is fed into the AM color demodula-
tion block. Therefore, it only applies to video signals that
contain chroma information in the form of an AM modulated
carrier (CVBS or Y/C in PAL or NTSC). It does not affect
SECAM and does not work on component video inputs
(YPrPb).
Table 51. HUE Function
HUE[7:0]
Description
(Adjust Hue of the Picture)
0x00*
Phase of the chroma signal = 0°.
0x7F
Phase of the chroma signal = –90°.
0xFF
Phase of the chroma signal = +90°.
*Default value.
DEF_Y[5:0] Default Value Y (SDP), Address 0x0C, [7:2]
In cases where the ADV7183A loses lock on the incoming video
signal or where there is no input signal, the DEF_Y[5:0] register
allows the user to specify a default luma value to be output.
This value is used under the following conditions:
If DEF_VAL_AUTO_EN bit is set to high and the
ADV7183A lost lock to the input video signal. This is the
intended mode of operation (automatic mode).
The DEF_VAL_EN bit is set, regardless of the lock status of
the video decoder.
This is a forced mode that may be useful during
configuration.
The DEF_Y[5:0] values define the 6 MSBs of the output video.
The remaining LSBs are padded with 0s. For example, in 8-bit
mode, the output is Y[7:0] = {DEF_Y[5:0], 0, 0}.
Table 52. DEF_Y Function
DEF_Y[5:0]
0x36 (Blue)*
*Default value.
Description
Default value of Y.
DEF_C[7:0] Default Value C (SDP), Address 0x0D, [7:0]
The DEF_C[7:0] register complements the DEF_Y[5:0] value. It
defines the 4 MSBs of Cr and Cb values to be output if
The DEF_VAL_AUTO_EN bit is set to high and the
ADV7183A can’t lock to the input video (automatic mode).
DEF_VAL_EN bit is set to high (forced output).
The data that is finally output from the ADV7183A for the
chroma side is Cr[7:0] = {DEF_C[7:4], 0, 0, 0, 0}, Cb[7:0] =
{DEF_C[3:0], 0, 0, 0, 0}.
DEF_C[7:0]
Description
0x7C (blue)*
Default values for Cr and Cb.
*Default value.
DEF_VAL_EN Default Value Enable (SDP),
Address 0x0C, [0]
This bit forces the use of the default values for Y, Cr, and Cb.
Refer to the descriptions for DEF_Y and DEF_C for additional
information. The decoder also outputs a stable 27 MHz clock,
HS, and VS in this mode.
Table 54. DEF_VAL_EN Function
DEF_VAL_EN
Description
0*
Don't force the use of default Y, Cr, and Cb
values. Output colors dependent on
DEF_VAL_AUTO_EN.
1
Always use default Y, Cr, and Cb values.
Override picture data even if the video decoder
is locked.
*Default value.
DEF_VAL_AUTO_EN Default Value Automatic Enable
(SDP), Address 0x0C, [1]
This bit enables the automatic usage of the default values for Y,
Cr, and Cb in cases where the ADV7183A cannot lock to the
video signal.
Table 55. DEF_VAL_AUTO_EN Function
DEF_VAL_AUTO_EN
Description
0
Don't use default Y, Cr, and Cb values. If
unlocked, output noise.
1*
Use default Y, Cr, and Cb values when
decoder loses lock.
*Default value.
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相關(guān)代理商/技術(shù)參數(shù)
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ADV7183AXT 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk
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