- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378286 > ADV7183AKST (ANALOG DEVICES INC) Multiformat SDTV Video Decoder PDF資料下載
參數(shù)資料
| 型號： | ADV7183AKST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | LEAD FREE, MS-026-BEC, LQFP-80 |
| 文件頁數(shù)： | 65/104頁 |
| 文件大小： | 894K |
| 代理商： | ADV7183AKST |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁當(dāng)前第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁
ADV7183A
REGISTER ACCESSES
The MPU can write to or read from all of the ADV7183A’s
registers, except the Subaddress register, which is write-only.
The Subaddress register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the Subaddress register.
Then, a read/write operation is performed from/to the target
address, which then increments to the next address until a Stop
command on the bus is performed.
Rev. A | Page 65 of 104
REGISTER PROGRAMMING
The following section describe each register in terms of its
configuration. The Communications register is an 8-bit, write-
only register. After the part has been accessed over the bus and a
read/write operation is selected, the subaddress is set up. The
Subaddress register determines to/from which register the
operation takes place. Table 172 lists the various operations
under the control of the Subaddress register for the control port.
Table 173 lists the various readback registers under the control
of the Subaddress register for the VBI port.
Register Select (SR7-SR0)
These bits are set up to point to the required starting address.
I
2
C SEQUENCER
An I
2
C sequencer is employed in cases where a parameter
exceeds eight bits, and is therefore distributed over two or more
I
2
C registers (e.g., HSB [11:0]).
When such a parameter is changed using two or more I
2
C write
operations, the parameter may hold an invalid value for the
time between the first I
2
C finishing and the last I
2
C being
completed. In other words, the top bits of the parameter may
already hold the new value while the remaining bits of the
parameter still hold the previous value.
To avoid this problem, the I
2
C sequencer holds the already
updated bits of the parameter in local memory; all bits of the
parameter are updated together once the last register write
operation has completed.
The correct operation of the I
2
C sequencer relies on the
following:
All I
2
C registers for the parameter in question must be
written to in order of ascending addresses. (e.g., for
HSB[10:0], write to Address 0x34 first, followed by 0x35).
No other I
2
C taking place between the two (or more) I
2
C
writes for the sequence (e.g., for HSB[10:0], write to
Address 0x34 first, immediately followed by 0x35).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7330 | Multiformat 11-Bit Triple DAC Video Encoder |
| ADV7330KST | Multiformat 11-Bit Triple DAC Video Encoder |
| ADXL321 | Small and Thin 18 g Accelerometer |
| ADXL321EB | Small and Thin 18 g Accelerometer |
| ADXL321JCP | Small and Thin 18 g Accelerometer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7183AKST-U1 | 制造商:Analog Devices 功能描述:VID DECODER 80LQFP - Bulk |
| ADV7183AKST-X2 | 制造商:Analog Devices 功能描述:VID DECODER - Bulk |
| ADV7183AXST | 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7183AXST-X2 | 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7183AXT | 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。