參數(shù)資料
型號(hào): ADV7183AKST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Multiformat SDTV Video Decoder
中文描述: COLOR SIGNAL DECODER, PQFP80
封裝: LEAD FREE, MS-026-BEC, LQFP-80
文件頁(yè)數(shù): 52/104頁(yè)
文件大?。?/td> 894K
代理商: ADV7183AKST
ADV7183A
ENVSPROC Enable VSync Processor (SDP),
Address 0x01, [3]
This block provides extra filtering of the detected VSyncs to
give improved vertical lock.
Table 137. ENVSPROC Function
ENVSPROC
Description
0
Disable VSync processor.
1*
Enable VSync processor.
*Default value.
SDP VBI DATA DECODE
The following low data rate VBI signals can be decoded by the
ADV7183A:
Rev. A | Page 52 of 104
Wide screen signaling (WSS)
Copy generation management systems (CGMS)
Closed captioning (CCAP)
EDTV
Gemstar 1× and 2× compatible data recovery
The presence of any of the above signals is detected and, if
applicable, a parity check is performed. The result of this testing
is contained in a confidence bit in the VBI Info[7:0] register.
Users are encouraged to first examine the VBI Info register
before reading the corresponding data registers. All VBI data
decode bits are read-only.
All VBI data registers are double-buffered with the field signals.
This means that data is extracted from the video lines and
appears in the appropriate I
2
C registers with the next field
transition. They are then static until the next field.
The user should start an I
2
C read sequence with VS by first
examining the VBI Info register. Then, depending on what data
was detected, the appropriate data registers should be read.
Note that the data registers are filled with decoded VBI data
even if their corresponding detection bits are low; it is likely
that bits within the decoded data stream are wrong.
Notes
The closed captioning data (CCAP) is available in the I
2
C
registers, and is also inserted into the output video data
stream during horizontal blanking.
The Gemstar compatible data is not available in the I
2
C
registers, and is inserted into the data stream only during
horizontal blanking.
WSSD Wide Screen Signaling Detected (SDP),
Address 0x90, [0]
Logic 1 for this bit indicates that the data in the WSS1 and
WSS2 registers is valid.
The WSSD bit goes high if the rising edge of the start bit is
detected within a time window, and if the polarity of the parity
bit matches the data transmitted.
Table 138. WSSD Function
WSSD
Description
0
No WSS detected. Confidence in decoded data is low.
1
WSS detected. Confidence in decoded data is high.
CCAPD Closed Caption Detected (SDP), Address 0x90, [1]
A Logic 1 for this bit indicates that the data in the CCAP1 and
CCAP2 registers is valid.
The CCAPD bit goes high if the rising edge of the start bit is
detected within a time window, and if the polarity of the parity
bit matches the data transmitted.
Table 139. CCAPD Function
CCAPD
Description
0
No CCAP signals detected. Confidence in decoded
data is low.
1
CCAP sequence detected. Confidence in decoded data
is high.
EDTVD EDTV Sequence Detected (SDP), Address 0x90, [2]
A Logic 1 for this bit indicates that the data in the EDTV1, 2, 3
registers is valid.
The EDTVD bit goes high if the rising edge of the start bit is
detected within a time window, and if the polarity of the parity
bit matches the data transmitted.
Table 140. EDTVD Function
EDTVD
Description
0
No EDTV sequence detected. Confidence in decoded
data is low.
1
EDTV sequence detected. Confidence in decoded data
is high.
CGMSD CGMS-A Sequence Detected (SDP),
Address 0x90, [3]
Logic 1 for this bit indicates that the data in the CGMS1, 2, 3
registers is valid. The CGMSD bit goes high if a valid CRC
checksum has been calculated from a received CGMS packet.
Table 141. CGMSD Function
CGMSD
Description
0
No CGMS transmission detected. Confidence low.
1
CGMS sequence decoded. Confidence high.
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