參數(shù)資料
型號： ADV7183AKST
廠商： ANALOG DEVICES INC
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Multiformat SDTV Video Decoder
中文描述： COLOR SIGNAL DECODER, PQFP80
封裝： LEAD FREE, MS-026-BEC, LQFP-80
文件頁數(shù)： 98/104頁
文件大?。?/td> 894K
代理商： ADV7183AKST
ADV7183A
Mode 2 S-Video Input (Y on AIN1 and C on AIN4)
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P15–P8.
Table 209. Mode 2 S-Video Input
Register Address
Register Value
Notes
0x00
0x06
Y1 = AIN1, C1 = AIN4.
0x01
0x88
Turn off HSYNC processor (SECAM only).
0x2B
0xE2
AGC tweak.
0x3A
0x12
Power down ADC 2.
0x51
0x24
Turn off FSC detect for IN LOCK status.
0xD2
0x01
AGC tweak.
0xD3
0x01
AGC tweak.
0xDB
0x9B
AGC tweak.
0x0E
0x85
ADI recommended programming sequence. This sequence must be followed exactly when
setting up the decoder.
0xB5
0x8B
Recommended setting.
0xD4
0xFB
Recommended setting.
0xD6
0x6D
Recommended setting.
0xE2
0xAF
Recommended setting.
0xE3
0x00
Recommended setting.
0xE4
0xB5
Recommended setting.
0xE8
0xF3
Recommended setting.
0x0E
0x05
Recommended setting.
Rev. A | Page 98 of 104
Mode 3 525i/625i YPrPb Input (Y on AIN2, Pr on AIN3, and Pb on AIN6)
All standards are supported through autodetect, 8-bit, ITU-R BT.656 output on P15–P8.
Table 210. Mode 3 YPrPb Input 525i/625i
Register Address
Register Value
Notes
0x00
0x0A
Y2 = AIN2, Pr2 = AIN3, Pb2 = AIN6.
0x01
0x88
Disable HSync PLL.
0x2B
0xE2
AGC tweak.
0x3A
0x10
Set latch clock.
0x51
0x24
Turn off FSC detect for IN LOCK status.
0xD2
0x01
AGC tweak.
0xD3
0x01
AGC tweak.
0xDB
0x9B
AGC tweak.
0x0E
0x85
ADI recommended programming sequence. This sequence must be followed exactly when setting
up the decoder.
0xD6
0x6D
Recommended setting.
0xE8
0xF3
Recommended setting.
0x0E
0x05
Recommended setting.
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相關代理商/技術參數(shù)
參數(shù)描述
ADV7183AKST-U1 制造商:Analog Devices 功能描述:VID DECODER 80LQFP - Bulk
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ADV7183AXST-X2 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk
ADV7183AXT 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk
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