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參數(shù)資料
| 型號： | AT85C51SND3B1-RTTUL |
| 廠商： | Atmel |
| 文件頁數(shù)： | 36/119頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DECODER/ENCODER DGTL 100-LQFP |
| 標準包裝： | 90 |
| 類型： | 音頻編碼器/解碼器 |
| 應(yīng)用： | 移動電話，手機，視頻顯示器 |
| 電壓 - 電源，數(shù)字： | 1.65 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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AT85C51SND3B
7632D–MP3–01/07
the clocks to the CPU and peripherals. Using INTn input, execution resumes
when the input is released (see Figure 10) while using KINx input, execution
resumes after counting 1024 clock ensuring the oscillator is restarted properly
(see Figure 11). This behavior is necessary for decoding the key while it is still
pressed. In both cases, execution resumes with the interrupt service routine.
Upon completion of the interrupt service routine, program execution resumes
with the instruction immediately following the instruction that activated Power-
down mode.
Note:
1. The external interrupt used to exit Power-down mode must be configured as level
sensitive (
INT0 and INT1) and must be assigned the highest priority. In addition, the
duration of the interrupt must be long enough to allow the oscillator to stabilize. The
execution will only resume when the interrupt is de-asserted.
2. Exit from power-down by external interrupt does not affect the SFRs nor the internal
RAM content.
Figure 10. Power-down Exit Waveform Using INT1:0
Figure 11. Power-down Exit Waveform Using KIN3:0
Note:
1. KIN3:0 can be high or low-level triggered.
2.
Generate a reset.
–
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU and
peripherals. Program execution momentarily resumes with the instruction
immediately following the instruction that activated Power-down mode and may
continue for a number of clock cycles before the internal reset algorithm takes
control. Reset initializes the AT85C51SND3B and vectors the CPU to address
0000h.
Notes:
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal
RAM content.
INT1:0
OSC
Power-down Phase
Oscillator Restart Phase
Active Phase
KIN3:0(1)
OSC
Power-down Phase
42000 clock count
Active Phase
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相關(guān)代理商/技術(shù)參數(shù) |
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| AT85C51SND3B2-RTTUL | 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| AT85C51SND3BX | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:MP3 Microcontrollers |
| AT85C51SND4B1-7FTUL | 功能描述:音頻 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| AT85DVK-07 | 功能描述:開發(fā)板和工具包 - 8051 DEV Kit SND3 RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| AT85EC5122 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:MICROCONTROLLER WITH USB AND SMART CARD READER INTERFACES |
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