參數(shù)資料
型號: ATMEGA103-6AI
廠商: Atmel
文件頁數(shù): 89/141頁
文件大?。?/td> 0K
描述: IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 90
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 6MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
配用: ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
51
ATmega103(L)
0945I–AVR–02/07
Bits 2, 1, 0 – CS12, CS11, CS10: Clock Select1, Bits 2, 1 and 0
The lock Select1 bits 2, 1 and 0 define the prescaling source of Timer/Counter1.
The Stop condition provides a Timer Enable/Disable function. The CK down divided
modes are scaled directly from the CK CPU clock. If the external pin modes are used for
Timer/Counter1, transitions on PD6/(T1) will clock the counter even if the pin is config-
ured as an output. This feature can give the user software control of the counting.
Timer/Counter1 – TCNT1H
and TCNT1L
This 16-bit register contains the prescaled value of the 16-bit Timer/Counter1. To
ensure that both the high and low bytes are read and written simultaneously when the
CPU accesses these registers, the access is performed using an 8-bit temporary regis-
ter (TEMP). This temporary register is also used when accessing OCR1A, OCR1B and
ICR1. If the main program and interrupt routines perform access to registers using
TEMP, interrupts must be disabled during access from the main program (and from
interrupt routines if interrupts are allowed from within interrupt routines).
TCNT1 Timer/Counter1 Write:
When the CPU writes to the High Byte TCNT1H, the written data is placed in the
TEMP Register. Next, when the CPU writes the Low Byte TCNT1L, this byte of data
is combined with the byte data in the TEMP Register, and all 16 bits are written to
the TCNT1 Timer/Counter1 Register simultaneously. Consequently, the High Byte
TCNT1H must be accessed first for a full 16-bit register write operation. When using
Timer/Counter1 as an 8-bit Timer, it is sufficient to write the Low Byte only.
TCNT1 Timer/Counter1 Read:
When the CPU reads the Low Byte TCNT1L, the data of TCNT1L is sent to the CPU
and the data of the High Byte TCNT1H is placed in the TEMP Register. When the
CPU reads the data in the High Byte TCNT1H, the CPU receives the data in the
TEMP Register. Consequently, the Low Byte TCNT1L must be accessed first for a
Table 17. Clock1 Prescale Select
CS12
CS11
CS10
Description
0
Stop, the Timer/Counter1 is stopped.
001
CK
010
CK/8
011
CK/64
100
CK/256
101
CK/1024
1
0
External Pin T1, falling edge
1
External Pin T1, rising edge
Bit
15141312
11
10
9
8
$2D ($4D)
MSB
TCNT1H
$2C ($4C)
LSB
TCNT1L
76
543
210
Read/Write
R/WR/W
Initial Value
0
00
000
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