參數(shù)資料
型號(hào)： BGY288
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 衰減器
英文描述： Power amplifier with integrated control loop for GSM850, EGSM900, DCS1800 and PCS1900
中文描述： 824 MHz - 849 MHz RF/MICROWAVE NARROW BAND HIGH POWER AMPLIFIER
封裝： 8 X 8 MM, PLASTIC, SOT-775A, 16 PIN
文件頁(yè)數(shù)： 4/22頁(yè)
文件大?。?/td> 140K
代理商： BGY288
9397 750 14011
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
4 of 22
Philips Semiconductors
BGY288
Power amplifier with integrated control loop
5.
Functional description
5.1 Operating conditions
The BGY288 is designed to meet the 3GPP TS 45.005 technical specification for the
ETSI.
5.2 Power amplifier
The low band (GSM850 and EGSM900) and the high band (DCS1800 and PCS1900)
channel power amplifiers each comprises three cascaded gain stages, input and output
matching and harmonic filters. The output power of each amplifier is determined by the
bias on each of its 3 gain stages and is controlled by an internal signal generated in the
power controller block. Each power amplifier block generates a power sense signal which
is routed internally to the power control block.
5.3 Control logic
The control logic block generates the various signals to control the complete BGY288
depending on the signal levels on pins TXON and BAND, as indicated in
Table 3
. The
control logic block supply voltage is via pin V
STAB
. When pin V
STAB
= 0 V, the BGY288 is in
Idle mode and the battery current consumption is almost zero. The power control block is
enabled when pin TXON goes HIGH. The low band (GSM850/EGSM900) channel is
enabled when pin BAND goes LOW and the high band (DCS1800/PCS1900) channel is
enabled when pin BAND goes HIGH. Both TXON and BAND inputs have pull-down
resistors of approximately 1 M
.
5.4 Power controller
The main inputs to the power controller block are the RF power control signal via pin PC
and the output power sense signal internally generated by each power amplifier block.
The PC signal is the reference voltage for the requested level of output power, and is
usually generated by an external digital-to-analog converter. The PC signal is buffered
and compared with the output power sense signal. The resultant error signal is then
amplified by one of two integrators, the selection of which being dependant on the level of
the BAND signal. The output of the selected integrator is the internal signal which controls
the biasing circuits of the selected channel.
5.5 Mode control
Table 3:
Mode
Mode control
Mode description
V
STAB
(V)
0
2.6 to 3
TXON
BAND
PC (V)
Idle
Standby control logic functioning; power amplifier off
power amplifier fully off; minimal leakage current
LOW
LOW
LOW
HIGH or
LOW
LOW
HIGH
< 0.15
< 0.15
LB TX
HB TX
low-band transmit mode (GSM850/EGSM900)
high-band transmit mode (DCS1800/PCS1900)
2.6 to 3
2.6 to 3
HIGH
HIGH
< 2.5
< 2.5
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