參數(shù)資料
型號(hào)： BU-62864
英文描述： MIL-STD-1553 Components |PCI-Enhanced Mini-ACE?
中文描述： 符合MIL - STD - 1553器件|的PCI增強(qiáng)迷你ACE論壇？
文件頁(yè)數(shù)： 30/56頁(yè)
文件大?。?/td> 368K
代理商： BU-62864
30
Data Device Corporation
www.ddc-web.com
BU-62743/62843/62864
A-03/03-1M
RT MEMORY MANAGEMENT
The PCI Enhanced Mini-ACE provides a variety of RT memory
management capabilities. As with the ACE, Mini-ACE(Plus) and
Enhanced Mini-ACE, the choice of memory management
scheme is fully programmable on a transmit/receive/broadcast
subaddress basis.
In compliance with MIL-STD-1553B Notice 2, received data from
broadcast messages may be optionally separated from non-
broadcast received data. For each receive or broadcast subad-
dress, either a single-message data block, or a variable-sized
(128 to 8192 words) subaddress circular buffer may be allocated
for data storage.The use of Single Buffered mode is strongly rec-
ommended for transmitted data words. The memory manage-
ment scheme for individual subaddresses is designated by
means of the subaddress control word (reference TABLE 56).
For received data, there is also a global circular buffer mode. In
this configuration, the data words received from multiple (or all)
subaddresses are stored in a common circular buffer structure.
Like the subaddress circular buffer, the size of the global circular
buffer is programmable, with a range of 128 to 8192 data words.
In addition to helping ensure data sample consistency, the circu-
lar buffer options provide a means of greatly reducing host
processor overhead for multi-message bulk data transfer appli-
cations.
End-of-message interrupts may be enabled either globally (fol-
lowing all messages), following error messages, on a
transmit/receive/broadcast subaddress or mode code basis, or
when a circular buffer reaches its midpoint (50% boundary) or
lower (100%) boundary. A pair of interrupt status registers allow
the host processor to determine the cause of all interrupts by
means of a single read operation.
SINGLE BUFFERED MODE
The operation of the single buffered RT mode is illustrated in
FIGURE 6. In the single buffered mode, the respective lookup
table entry must be initialized by the host processor. Received
data words are written to, or transmitted data words are read
from the data word block with starting address referenced by the
lookup table pointer. In the single buffered mode, the current
lookup table pointer is not updated by the PCI Enhanced Mini-
ACE memory management logic. Therefore, if a subsequent
message is received for the same subaddress, the same Data
Word block will be overwritten or overread.
DATA
BLOCKS
DATA BLOCK
DATA BLOCK
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
DESCRIPTOR
STACKS
LOOK-UP
TABLE ADDR
LOOK-UP TABLE
(DATA BLOCK ADDR)
15
13
0
CURRENT
AREA B/A
CONFIGURATION
REGISTER
STACK
POINTERS
(See note)
Note: Lookup table is not used for mode commands when enhanced mode codes are enabled.
FIGURE 6. RT SINGLE BUFFERED MODE
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