The C8051F000 family has on-chip JTAG and debug circuitry that provide no" />
參數(shù)資料
型號: C8051F015-TB
廠商: Silicon Laboratories Inc
文件頁數(shù): 57/171頁
文件大小: 0K
描述: BOARD PROTOTYPING W/C8051F015
標(biāo)準(zhǔn)包裝: 1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
1.3.
JTAG Debug and Boundary Scan
The C8051F000 family has on-chip JTAG and debug circuitry that provide non-intrusive, full speed, in-circuit
debug using the production part installed in the end application using the four-pin JTAG I/F. The JTAG port is
fully compliant to IEEE 1149.1, providing full boundary scan for test and manufacturing purposes.
Silicon Labs’ debug system supports inspection and modification of memory and registers, breakpoints,
watchpoints, a stack monitor, and single stepping.
No additional target RAM, program memory, timers, or
communications channels are required. All the digital and analog peripherals are functional and work correctly
while debugging. All the peripherals (except for the ADC) are stalled when the MCU is halted, during single
stepping, or at a breakpoint in order to keep them in sync.
The C8051F000DK, C8051F005DK, C8051F010DK, and C8051F015DK are development kits with all the
hardware and software necessary to develop application code and perform in-circuit debug with the C8051F000/1/2,
F005/6/7, F010/1/2, and F015/6/7 MCUs respectively. The kit includes software with a developer’s studio and
debugger, an integrated 8051 assembler, and an RS-232 to JTAG protocol translator module referred to as the EC.
It also has a target application board with the associated MCU installed and a large prototyping area, plus the RS-
232 and JTAG cables, and wall-mount power supply.
The Development Kit requires a Windows
95/98/NT/2000/XP computer with one available RS-232 serial port. As shown in Figure 1.7, the PC is connected
via RS-232 to the EC. A six-inch ribbon cable connects the EC to the user’s application board, picking up the four
JTAG pins and VDD and GND. The EC takes its power from the application board. It requires roughly 20mA at
2.7-3.6V. For applications where there is not sufficient power available from the target board, the provided power
supply can be connected directly to the EC.
This is a vastly superior configuration for developing and debugging embedded applications compared to standard
MCU Emulators, which use on-board “ICE Chips” and target cables and require the MCU in the application board
to be socketed. Silicon Labs’ debug environment both increases ease of use and preserves the performance of the
precision analog peripherals.
Figure 1.7. Debug Environment Diagram
TARGET PCB
RS-232
EC
C8051
F005
VDD GND
JTAG (x4), VDD, GND
WINDOWS 95/98/NT/2000/XP
Silicon Labs Integrated
Development Environment
15
Rev. 1.7
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