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| 型號： | COP8CBR9KMT8 |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 101/111頁 |
| 文件大小： | 0K |
| 描述： | IC MCU EEPROM 8BIT 32K 56-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 34 |
| 系列： | COP8™ 8C |
| 核心處理器： | COP8 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | Microwire/Plus（SPI），UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 49 |
| 程序存儲器容量： | 32KB（32K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | *COP8CBR9KMT8 |
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SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Code efficiency is important because it enables designers to pack more on-chip functionality into less
program memory space (ROM, OTP or Flash). Selecting a microcontroller with less program memory size
translates into lower system costs, and the added security of knowing that more code can be packed into
the available program memory space.
2.3.6.1
Key Instruction Set Features
The COP8 family incorporates a unique combination of instruction set features, which provide designers
with optimum code efficiency and program memory utilization.
2.3.6.2
Single Byte/Single Cycle Code Execution
The efficiency is due to the fact that the majority of instructions are of the single byte variety, resulting in
minimum program space. Because compact code does not occupy a substantial amount of program
memory space, designers can integrate additional features and functionality into the microcontroller
program memory space. Also, the majority instructions executed by the device are single cycle, resulting
in minimum program execution time. In fact, 77% of the instructions are single byte single cycle, providing
greater code and I/O efficiency, and faster code execution.
2.3.6.3
Many Single-Byte, Multi-Function Instructions
The COP8 instruction set utilizes many single-byte, multifunction instructions. This enables a single
instruction to accomplish multiple functions, such as DRSZ, DCOR, JID, LD (Load) and X (Exchange)
instructions with post-incrementing and post-decrementing, to name just a few examples. In many cases,
the instruction set can simultaneously execute as many as three functions with the same single-byte
instruction.
JID: (Jump Indirect); Single byte instruction decodes external events and jumps to corresponding service
routines (analogous to “DO CASE” statements in higher level languages).
LAID: (Load Accumulator-Indirect); Single byte look up table instruction provides efficient data path from
the program memory to the CPU. This instruction can be used for table lookup and to read the entire
program memory for checksum calculations.
RETSK: (Return Skip); Single byte instruction allows return from subroutine and skips next instruction.
Decision to branch can be made in the subroutine itself, saving code.
AUTOINC/DEC: (Auto-Increment/Auto-Decrement); These instructions use the two memory pointers B
and X to efficiently process a block of data (simplifying “FOR NEXT” or other loop structures in higher
level languages).
2.3.6.4
Bit-Level Control
Bit-level control over many of the microcontroller's I/O ports provides a flexible means to ease layout
concerns and save board space. All members of the COP8 family provide the ability to set, reset and test
any individual bit in the data memory address space, including memory-mapped I/O ports and associated
registers.
2.3.6.5
Register Set
Three memory-mapped pointers handle register indirect addressing and software stack pointer functions.
The memory data pointers allow the option of post-incrementing or post- decrementing with the data
movement instructions (LOAD/EXCHANGE). And 15 memory-mapped registers allow designers to
optimize the precise implementation of certain specific instructions.
Copyright 2000–2013, Texas Instruments Incorporated
Device Information
9
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