參數(shù)資料
型號(hào)： COP8CBR9KMT8
廠商： National Semiconductor
文件頁(yè)數(shù)： 72/111頁(yè)
文件大?。?/td> 0K
描述： IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝： 34
系列： COP8™ 8C
核心處理器： COP8
芯體尺寸： 8-位
速度： 20MHz
連通性： Microwire/Plus（SPI），UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 49
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
包裝： 管件
其它名稱(chēng)： *COP8CBR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
5.13.5 FRAMING FORMATS
The USART supports several serial framing formats (Figure 5-17). The format is selected using control
bits in the ENU, ENUR and ENUI registers.
The first format (1, 1a, 1b, 1c) for data transmission (CHL0 = 1, CHL1 = 0) consists of Start bit, seven
Data bits (excluding parity) and one or two Stop bits. In applications using parity, the parity bit is
generated and verified by hardware.
The second format (CHL0 = 0, CHL1 = 0) consists of one Start bit, eight Data bits (excluding parity) and
7/8, one or two Stop bits. Parity bit is generated and verified by hardware.
The third format for transmission (CHL0 = 0, CHL1 = 1) consists of one Start bit, nine Data bits and one or
two Stop bits. This format also supports the USART “ATTENTION” feature. When operating in this format,
all eight bits of TBUF and RBUF are used for data. The ninth data bit is transmitted and received using
two bits in the ENU and ENUR registers, called XBIT9 and RBIT9. RBIT9 is a read only bit. Parity is not
generated or verified in this mode.
The parity is enabled/disabled by PEN bit located in the ENU register. Parity is selected for 7- and 8-bit
modes only. If parity is enabled (PEN = 1), the parity selection is then performed by PSEL0 and PSEL1
bits located in the ENU register.
Note that the XBIT9/PSEL0 bit located in the ENU register serves two mutually exclusive functions. This
bit programs the ninth bit for transmission when the USART is operating with nine data bits per frame.
There is no parity selection in this framing format. For other framing formats XBIT9 is not needed and the
bit is PSEL0 used in conjunction with PSEL1 to select parity.
The frame formats for the receiver differ from the transmitter in the number of Stop bits required. The
receiver only requires one Stop bit in a frame, regardless of the setting of the Stop bit selection bits in the
control register. Note that an implicit assumption is made for full duplex USART operation that the framing
formats are the same for the transmitter and receiver.
Copyright 2000–2013, Texas Instruments Incorporated
Functional Description
63
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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