參數(shù)資料
型號： COP8CBR9KMT8
廠商： National Semiconductor
文件頁數(shù)： 23/111頁
文件大?。?/td> 0K
描述： IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝： 34
系列： COP8™ 8C
核心處理器： COP8
芯體尺寸： 8-位
速度： 20MHz
連通性： Microwire/Plus（SPI），UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 49
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 16x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
包裝： 管件
其它名稱： *COP8CBR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Port E is an 8-bit I/O Port. The 44-pin device does not offer Port E. The unavailable pins are not
terminated. A read operation on these unterminated pins will return unpredictable values. On this device,
the associated Port E Data and Configuration registers should not be used. All E pins have Schmitt
triggers on the inputs. Port E draws no power when unbonded.
Port F is a 4-bit I/O Port. All F pins have Schmitt triggers on the inputs.
The 68-pin package has fewer than eight Port F pins, and contains unbonded, floating pads internally on
the chip. The binary values read from these bits are undetermined. The application software should mask
out these unknown bits when reading the Port F register, or use only bit-access program instructions when
accessing Port F. The unconnected bits draw power only when they are addressed (i.e., in brief spikes).
Port G is an 8-bit port. Pin G0, G2–G5 are bi-directional I/O ports. Pin G6 is always a general purpose Hi-
Z input. All pins have Schmitt Triggers on their inputs. Pin G1 serves as the dedicated WATCHDOG
output with weak pull-up if the WATCHDOG feature is selected by the Option register. The pin is a
general purpose I/O if WATCHDOG feature is not selected. If WATCHDOG feature is selected, bit 1 of
the Port G configuration and data register does not have any effect on Pin G1 setup. G7 serves as the
dedicated output pin for the CKO clock output.
Since G6 is an input only pin and G7 is the dedicated CKO clock output pin, the associated bits in the
data and configuration registers for G6 and G7 are used for special purpose functions as outlined below.
Reading the G6 and G7 data bits will return zeros.
The device will be placed in the HALT mode by writing a “1” to bit 7 of the Port G Data Register. Similarly
the device will be placed in the IDLE mode by writing a “1” to bit 6 of the Port G Data Register.
Writing a “1” to bit 6 of the Port G Configuration Register enables the MICROWIRE/PLUS to operate with
the alternate phase of the SK clock. The G7 configuration bit, if set high, enables the clock start up delay
after HALT when the R/C clock configuration is used.
Config. Reg.
Data Reg.
G7
CLKDLY
HALT
G6
Alternate SK
IDLE
Port G has the following alternate features:
G7
CKO Oscillator dedicated output
G6
SI (MICROWIRE/PLUS Serial Data Input)
G5
SK (MICROWIRE/PLUS Serial Clock)
G4
SO (MICROWIRE/PLUS Serial Data Output)
G3
T1A (Timer T1 I/O)
G2
T1B (Timer T1 Capture Input)
G1
WDOUT WATCHDOG and/or Clock Monitor if WATCHDOG enabled, otherwise it is a
general purpose I/O
G0
INTR (External Interrupt Input)
G0 through G3 are also used for In-System Emulation.
Port L is an 8-bit I/O port. All L-pins have Schmitt triggers on the inputs.
Port L supports the Multi-Input Wake-up feature on all eight pins. Port L has the following alternate pin
functions:
L7
Multi-Input Wake-up or T3B (Timer T3B Input)
L6
Multi-Input Wake-up or T3A (Timer T3A Input/Output)
L5
Multi-Input Wake-up or T2B (Timer T2B Input)
Copyright 2000–2013, Texas Instruments Incorporated
Pin Descriptions
19
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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