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| 型號(hào)： | CR16HCS5VJE8 |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 22/157頁(yè) |
| 文件大小： | 1256K |
| 代理商： | CR16HCS5VJE8 |
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22
9.0
Memory
The CompactRISC architecture supports a uniform linear ad-
dress space of 2 megabytes, addressed by 21 bits. The de-
vice implementation of this architecture uses only the lowest
128K bytes of address space. Each memory location con-
tains a byte consisting of eight bits.
Various types of on-chip memory occupy specific intervals
within the address space: 64K bytes of flash EEPROM pro-
gram memory, 3K bytes of static RAM, 2K bytes of low endur-
ance EEPROM data memory, 128 bytes of high endurance
EEPROM data memory, and 1.5K bytes of ISP memory. All
of these memories are 16 bits wide, and their contents can
be accessed either as bytes (eight bits wide) or words (16 bits
wide except for the program memory which only supports
word access).
The CPU core uses the Load and Store instructions to ac-
cess memory. These instructions can operate on bytes or
words. For a byte access, the CPU operates on a single byte
occupying a specified memory address. For a word access,
the CPU operates on two consecutive bytes. In that case, the
specified address refers to the least significant byte of the
data value; the most significant byte is located at the next
higher address. Thus, the ordering of bytes in memory is
from least to most significant byte, known as “l(fā)ittle-endian” or-
dering. For more efficient data access operations, 16-bit vari-
ables should be stored starting at word boundaries (at even
address).
9.1
The flash EEPROM program memory is used to store the ap-
plication program. The 64K bytes of this memory reside in the
address range of 0000-BFFF hex and 1C000-1FFFF in Zone
0 of the CR16B address space. A normal CPU write opera-
tion to this memory has no effect.
The flash EEPROM Program Memory module has the follow-
ing features:
— 64K bytes arranged as 32K by 16 bits
— Page size of 64 words
— 30 ms programming pulse per word
— Page mode erase with a 1 ms pulse, mass erase with
4ms pulse
— All erased flash EEPROM program memory bits read 1
— Fast single cycle read access
— Flexible software controlled In-System-Programming
(ISP) capability
— Pipelined programming cycles through double-buff-
ered data register, with write access disabled when the
register is full
— Programming high voltage and timing generated on-
chip
— Memory disabled when address is out of range
— Requires valid key for program and erase to proceed
— Provide busy status during programming and erase
— Read accesses disabled during programming and
erase
— Security features to limit read/write access
FLASH EEPROM PROGRAM MEMORY
9.1.1
Program memory read accesses can operate without wait cy-
cles with a CPU clock rate of up to 20MHz in the normal
Reading
mode. At higher clock rates, memory read accesses can op-
erate with one wait state.
The programmed number of wait cycles used (either zero or
one) is controlled by the BIU Configuration (BCFG) register
and the Static Zone 0 Configuration (SZCFG0) register.
These registers are described in Section 8.0.
9.1.2
The flash EEPROM program memory can be programmed
either with the device plugged into a flash EEPROM pro-
grammer unit (External Programming) or with the device al-
ready installed in the application system (In-System-
Programming).
If the device is programmed using a flash EEPROM program-
mer, the device is set into an external programming mode. In
this mode the device operates as if it were a pure flash mem-
ory device. The flash memory is programmed without involv-
ing any CPU activity.
If the device is to be programmed within the user application,
it can either be done by an user written boot loader or by uti-
lizing a pre-programmed in-system-programming code (ISP-
Code) residing in the boot ROM array of the device.
The device executes the pre-programmed in-system-pro-
gramming code if it operates in the In-System-Programming
Mode (ISP-Mode). To enter the ISP-Mode the device must be
reset (or powered-up) with the ENV0-pin set to low level and
the ENV1-pin set to high level (or left open). Also if the flash
program memory is not programmed yet (FLCTRL2.EMPTY
bit is still set) the device automatically enters the ISP-Mode
after reset, even though both pins ENV0 and ENV1are at
high level (or left open). If the device enters the ISP-Mode it
starts execution at address E000 hex.
In ISP-Mode the program code can be downloaded into the
device using one of the on-chip USARTs and written into the
flash program memory. For more detailed information on the
In-System-Programming features of the pre-programmed
ISP-Code please refer to the ISP-Monitor manual.
Conventional Programming Modes
9.1.3
Instead of using a flash EEPROM programmer unit or the
conventional in-system programming mode, you can write
your own processor code to program and erase the flash
EEPROM program memory. User-written code is more flexi-
ble than using the other programming methods. Like the con-
ventional in-system programming mode, the device is
programmed while it is installed in the system. It is not nec-
essary to reset the device or use the ENV0/ENV1 pins to
configure the device.
User-written flash programming code must reside outside of
the flash program memory. This is because the entire pro-
gram memory becomes unavailable while programming or
erasing any part of this memory.
User-Coded Programming Routines
9.1.4
The flash EEPROM program memory programming and
erase can be performed using different methods. It can be
done through user code that is stored in system RAM, or
through In-System-Programming mode, but should not be
programmed through the flash EEPROM program memory it-
Flash EEPROM Programming and Verify
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CR16HCS9VJE7Y | Microcontroller |
| CR16HCS9VJE8Y | Microcontroller |
| CR16HCT5 | |
| CR16HCT5VJE7Y | Microcontroller |
| CR16HCT5VJE8Y | Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16HCS5VJE8Y | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Microcontroller |
| CR16HCS5VJI8 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9VJE0 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9VJE1 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
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