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參數(shù)資料
| 型號(hào)： | CR16HCS5VJE8 |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 85/157頁(yè) |
| 文件大?。?/td> | 1256K |
| 代理商： | CR16HCS5VJE8 |
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www.national.com
20.0
CR16CAN Module
The CR16CAN device contains a FULL-CAN class, CAN
(Controller Area Network) serial bus interface for low/high
speed applications. It supports the reception and transmis-
sion of extended frames with 29-bit identifier, standard
frames with 11-bit identifier, applications that require a high
speed (up to 1MBit/s), and a low speed CAN interface with
CAN master capability. The data transfer between CAN and
the CPU is established by 15 message buffers, which can be
individually configured as receive or transmit buffers. Every
message buffer includes a status/control register which pro-
vides information about its current status and capabilities to
configure the buffer. All message buffers are able to generate
an interrupt upon the reception of a valid frame or the suc-
cessful transmission of a frame. In addition, an interrupt on
bus errors can be generated.
An incoming message is only accepted if the message iden-
tifier passes one of two acceptance filtering masks. The filter-
ing mask can be configured to receive a single message ID
per buffer or a group of IDs per receive buffer. One of the
buffers uses a separate message filtering procedure. This
provides the capability to establish a BASIC-CAN path. Re-
mote transmission requests can be processed automatically
by automatic reconfiguration to a receiver after transmission
or by automated transmit scheduling upon reception. A prior-
ity decoder allows any buffer to have one of 16 transmit pri-
orities including the highest or lowest absolute priority,
totaling 240 different transmit priorities.
A decided bit time counter (16-bit wide) is provided to support
real time applications. The contents of this counter is cap-
tured into the message buffer RAM upon reception or trans-
mission. The counter can be synchronized via the CAN
network. This synchronization feature allows a reset of the
counter after the reception or transmission of a message in
buffer 0.
The CR16CAN is a fast core bus peripheral which allows sin-
gle cycle byte or word read/write access. The CPU controls
the CR16CAN by modifying the various registers in the
CR16CAN register block. This includes the initialization of
the CAN baud rate, the CAN pin logic level, and the enable/
disable of the CR16CAN. A set of diagnostic features, such
as loopback, listen only and error identification, support the
development with the CR16CAN module and provide a so-
phisticated error management tool.
The CR16CAN implements the following features:
CAN specification 2.0B
— standard data and remote frames
— extended data and remote frames
— 0 - 8 bytes data length
— programmable bit rate up to 1 Mbit/s
15 message buffers, each configurable as receive or
transmit buffers
— message buffers are 16-bit wide dual-port RAM
— one buffer may be used as BASIC-CAN path
Remote Frame support
— automatic transmission after reception of a Remote
Transmission Request (RTR)
— auto receive after transmission of a RTR
Acceptance filtering
— two filtering capabilities: global acceptance mask & in-
dividual buffer identifiers
— one of the buffers uses an independent acceptance fil-
tering procedure
Programmable transmit priority
Interrupt capability
— one interrupt vector for all message buffers (receive/
transmit/error)
— each interrupt source can be enabled/disabled
16-bit counter with time stamp capability on successful re-
ception or transmission of a message
Power Save capabilities with programmable Wake-Up
over the CAN bus (alternate source for the Multi-Input
Wake-Up module)
Push-Pull capability of the input/output pins
Diagnostic functions
— error identification
— loopback and listen-only features for test and initializa-
tion purposes
20.1
As shown in Figure 44, the CR16CAN module is separated
into three blocks: the CAN core, the interface management
and a dual ported RAM containing the message buffers.
There are two dedicated device pins for the CR16CAN inter-
face, CANTX as the transmit output and CANRX as the re-
ceive input.
The CAN Core implements the basic CAN protocol features
such as bit-stuffing, CRC calculation/checking and error
management. It controls the transceiver logic and creates er-
ror signals according to the bus rules. In addition, it converts
the data stream from the CPU (parallel data) to the serial
CAN bus data.
The Interface Management is divided into the register block
and the interface management processor. The register block
provides the CAN Interface with control information from the
CPU and in turn provides the CPU with status information
from the CAN module. Additionally it generates the interrupt
to the CPU.
The interface management processor is a state machine ex-
ecuting the CPU’s transmission and reception commands
and controlling the data transfer between several message
buffers and RX/TX shift registers.
Fifteen Message Buffers are memory mapped into RAM to
transmit/receive data via the CAN bus. Eight 16-bit registers
belong to each buffer. One of the registers contains control
and status information about the message buffer configura-
tion and the current state of the buffer. The other registers are
used for the message identifier, a maximum of up to eight
data bytes and the time stamp information. During the re-
ceive process the incoming message will be stored at first in
a hidden receive buffer until the message is valid. Then the
buffer contents will be copied into the first message buffer
which accepts the ID of the received message.
FUNCTIONAL DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CR16HCS9VJE7Y | Microcontroller |
| CR16HCS9VJE8Y | Microcontroller |
| CR16HCT5 | |
| CR16HCT5VJE7Y | Microcontroller |
| CR16HCT5VJE8Y | Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16HCS5VJE8Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCS5VJI8 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9VJE0 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16HCS9VJE1 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
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