參數(shù)資料
型號(hào)： CR16HCS5VJE8
英文描述： Microcontroller
中文描述： 微控制器
文件頁數(shù)： 54/157頁
文件大?。?/td> 1256K
代理商： CR16HCS5VJE8
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54
counter or to operate in the pulse accumulate mode because
the TnB input is used as a capture input. Attempting to select
one of these configurations will cause one or both counters
to stop. In this mode, Timer/Counter II must be enabled at all
times.
15.3
Each Multi-Function Timer unit has four interrupt sources,
designated A, B, C, and D. Interrupt sources A, B, and C are
mapped into a single system interrupt called Timer Interrupt
I, while interrupt source D is mapped into a system interrupt
called Timer Interrupt II. Each of the four interrupt sources
has its own enable bit and pending flag. The enable flags are
named TnAIEN, TnBIEN, TnCIEN, and TnDIEN. The pend-
ing flags are named TnAPND, TnBPND, TnCPND, and TnD-
PND.
For Multi-Function Timer unit MFT1, Timer Interrupts I and II
are system interrupts T1A and T1B (IRQ13 and IRQ12), re-
spectively. For Multi-Function Timer unit MFT2, Timer Inter-
rupts I and II are system interrupts T2A and T2B (IRQ11 and
IRQ10), respectively.
Table 15 shows the events that trigger interrupts A, B, C, and
D in each of the four operating modes. Note that some inter-
rupt sources are not used in some operating modes, as indi-
cated by the notation “N/A” (Not Applicable) in the table.
TIMER INTERRUPTS
15.4
Each Multi-Function Timer unit uses two I/O pins, called T1A
and T1B (for Timer MFT1) or T2A and T2B (for Timer MFT2).
The function of each pin depends on the timer operating
mode and the TnAEN and TnBEN enable bits. Table 16
TIMER I/O FUNCTIONS
shows the functions of the pins in each operating mode, and
for each combination of enable bit settings.
When pin TnA is configured to operate as a PWM output
(TnAEN = 1), the state of the pin is toggled on each underflow
of the TnCNT1 counter. In this case, the initial value on the
pin is determined by the TnAOUT bit. For example, to start
with TnA high, the software should set the TnAOUT bit to 1
prior to enabling the timer clock. This option is available only
when the timer is configured to operate in Mode 1, 3, or 4 (in
other words, when TnCRA is not used in Capture mode)
.
Figure 17.
Mode 4: Input Capture Plus Timer Block Diagram
Reload A
TnCRA
Timer/Counter I
TnCNT1
Capture B
TnCRB
Timer I
Clock
TnA
TnAIEN
TnAPND
Timer
Interrupt I
TnATEN
Timer/Counter II
TnCNT2
Timer II
Clock
Underflow
TnDIEN
TnDPND
Timer
Interrupt II
TnBIEN
TnBPND
Timer
Interrupt I
TnB
TnBEN
Preset
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