參數(shù)資料
型號(hào)： CXD1198AQ
廠商： Sony Corporation
英文描述： CD-ROM Subcode Decoder
中文描述： 光盤子碼解碼器
文件頁(yè)數(shù)： 18/51頁(yè)
文件大?。?/td> 426K
代理商： CXD1198AQ
—18—
CXD1198AQ
2. Description of Register Functions
2-1. Write Registers
(1)
Reset Control Register (00H)
Bit 0 : BMM Reset
When this bit is “1”, all the circuits in this IC except for this register and the HCLK frequency
divider circuit are initialized. This bit is automatically set to “0” after the IC has been initialized.
Bit 1 : Drive Reset
When this bit is “1”, the XDRS pin is set to low (activated).
Bit 2 : SCSI Reset
When this bit is “1”, the XSRS pin is set to low (activated).
Bit 3 : Reserved
Bit 4 : Reserved
Bit 5 : Reserved
Bit 6 : Reserved
Bit 7 : Reserved
(2)
DMA Control Register-1 (01H)
Bit 0 : Drive DMA Enable
DMA with the CXD1186BQ is enabled when “1” is written in this bit.
Bit 1 : Drive DMA Source
Selects the transfer direction of DMA with the CXD1186BQ : when “0”, data is transferred from
the buffer memory to the CXD1186BQ and when “1”, from the CXD1186BQ to the buffer
memory. This bit is valid only when Bits 0 is “1”.
Bit 2 : Error Pointer Transfer Enable
When this bit is “1”, the error pointers are written into the buffer memory together with the main
channel data. This bit is valid only when Bits 0 and 1 are both “1”.
Bit 3 : Error Pointer Transfer Mode
Selects the format for writing the error pointers into the buffer memory. When “0”, all the error
pointers starting from the address selected by the Pointer DMA Address Counter are written
separately from the main channel data (separated mode). When “1”, 1 byte of the error pointer
is written immediately after 8-byte of the main channel data (mixed mode). (The value of
Pointer DMA Address Counter is ignored in this case.) This bit is valid only when Bits 0, 1 and
2 are all “1”.
Bit 4 : Sync Pattern Enable
When this bit is “1” a 12-byte dummy sync pattern is written starting with the address selected
by the Drive DMA Address Counter before the data is written from the CXD1186BQ into the
buffer memory. (It is assumed in this case that the error pointer of the sync byte is “0”.) This
bit is valid only when Bits 0 and 1 are both “1”.
Bit 5 : Reserved
Bit 6 : Reserved
Bit 7 : Reserved
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參數(shù)描述
CXD1199AQ 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD-ROM DECODER
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CXD12-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
CXD1217 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Synchronizing Signal Generator for Video Camera
CXD1217M 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Synchronizing Signal Generator for Video Camera
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