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參數(shù)資料
| 型號： | CY7C1339B-133BGIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 32 CACHE SRAM, 4 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 527K |
| 代理商： | CY7C1339B-133BGIT |
CY7C1339B
Document #: 38-05141 Rev. *A
Page 8 of 17
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... 65°C to +150°C
Ambient Temperature with
Power Applied
.................................................. 55°C to +125°C
Supply Voltage on VDD Relative to GND.........0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State[7]
....................................... 0.5V to VDD + 0.5V
DC Input Voltage[7]
.................................... 0.5V to VDD + 0.5V
Current into Outputs (LOW) .........................................20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... >200 mA
Operating Range
Range
Ambient
Temperature[8]
VDD
VDDQ
Commercial
0°C to +70°C
3.3V
5%/+10%
2.5V
5%
3.3V /+10%
Industrial
–40°C to +85°C
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max.
Unit
VDD
Power Supply Voltage
3.3V
5%/+10%
3.135
3.6
V
VDDQ
I/O Supply Voltage
2.5V
5% to 3.3V +10%
2.375
3.6
V
VOH
Output HIGH Voltage
VDDQ = 3.3V, VDD = Min., IOH = –4.0 mA
2.4
V
VDDQ = 2.5V, VDD = Min., IOH = –2.0 mA
2.0
V
VOL
Output LOW Voltage
VDDQ = 3.3V, VDD = Min., IOL = 8.0 mA
0.4
V
VDDQ = 2.5V, VDD = Min., IOL = 2.0 mA
0.7
V
VIH
Input HIGH Voltage
VDDQ = 3.3V
2.0
VDD + 0.3V
V
VDDQ = 2.5V
1.7
VDD + 0.3V
V
VIL
Input LOW Voltage[7]
VDDQ = 3.3V
–0.3
0.8
V
VDDQ = 2.5V
–0.3
0.7
V
IX
Input Load Current
except ZZ and MODE
GND
≤ VI ≤ VDDQ
5
A
Input Current of MODE Input = VSS
30
A
Input = VDDQ
5
A
Input Current of ZZ
Input = VSS
5
A
Input = VDDQ
30
A
IOZ
Output Leakage
Current
GND
≤ VI ≤ VDDQ, Output Disabled
5
A
IDD
VDD Operating Supply
Current
VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
6-ns cycle, 166 MHz
420
mA
7.5-ns cycle, 133 MHz
375
mA
10-ns cycle, 100 MHz
325
mA
ISB1
Automatic CS
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL
f = fMAX = 1/tCYC
6-ns cycle, 166 MHz
150
mA
7.5-ns cycle, 133 MHz
125
mA
10-ns cycle, 100 MHz
115
mA
ISB2
Automatic CS
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected,
VIN ≤ 0.3V or VIN > VDDQ – 0.3V,
f = 0
All speeds
10
mA
ISB3
Automatic CS
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected, or
VIN ≤ 0.3V or VIN > VDDQ – 0.3V
f = fMAX = 1/tCYC
6-ns cycle, 166 MHz
125
mA
7.5-ns cycle, 133 MHz
95
mA
10-ns cycle, 100 MHz
85
mA
ISB4
Automatic CS
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL, f = 0
18
mA
Notes:
7.
Minimum voltage equals
2.0V for pulse durations of less than 20 ns.
8.
TA is the case temperature.
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