- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376551 > D950-CORE (意法半導(dǎo)體) 16-Bit Fixed Point Digital Signal Processor DSP Core PDF資料下載
參數(shù)資料
| 型號(hào)： | D950-CORE |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-Bit Fixed Point Digital Signal Processor DSP Core |
| 中文描述： | 16位定點(diǎn)數(shù)字信號(hào)處理器DSP核 |
| 文件頁(yè)數(shù)： | 40/89頁(yè) |
| 文件大?。?/td> | 560K |
| 代理商： | D950-CORE |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)當(dāng)前第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)
40/89
D950-Core
5
SOFTWARE ARCHITECTURE
5.1 Introduction
Instruction execution is performed in a 3-stage pipeline: fetch/decode/execute. While
instruction n is executed, instruction n+1 is decoded and instruction n+2 is fetched. The
instruction cycle period is twice the CLKIN period. According to the number of words used,
D950-Core instructions can be of two types: one word intructions or extension word
instructions.
One Word Instructions:
Most of D950-Core instructions are one cycle instructions:
All arithmetic and logic instructions with or without parallel data moves,
excepted instructions performing double precision multiplication and bit manip-
ulations.
Register to register data move.
Memory to register indirect data move.
The following are multiple cycle instructions:
Double precision MAC (two cycles).
Indirect indexed register move (two cycles).
Indirect indexed register to stack move (two cycles).
Register to Program memory transfer (four cycles).
Instructions causing a program flow change (RTS, RTI, SWI, RESET, BREAK, CONTINUE)
are executed in one to three cycles.
Extension Word Instructions:
One program memory word is fetched at each cycle, therefore, if an instruction needs
extension words, they are fetched during the cycles following the first fetch. Execution of the
instruction starts two cycles after its first fetch cycle.
Memory to register data move in direct addressing mode (2-words/2-cycles)
(second word = address value).
Immediate register load (2-words/2-cycles) (second word = register value).
Repeat block up to 511 times (2-words/2-cycles) (second word = LE).
Repeat single up to 2
16
-1 times (2-words/2-cycles) (second word = LC).
Repeat block computed (2-words/2-cycles) (second word = LC).
Bit manipulations (2-words/2-cycles) (second word = mask).
6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| D965-R | NPN Plastic-Encapsulate Transistors |
| D965-T | NPN Plastic-Encapsulate Transistors |
| DA-02325D1102 | 14-Bit Digital-to-Analog Converter |
| DA-02325D1112 | 14-Bit Digital-to-Analog Converter |
| DA-02325D1113 | 14-Bit Digital-to-Analog Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| D950N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Netz-Gleichrichterdiode Rectifier Diode |
| D950N18T | 功能描述:整流器 Rectifier Diode 950A 1800V RoHS:否 制造商:Vishay Semiconductors 產(chǎn)品:Standard Recovery Rectifiers 配置: 反向電壓:100 V 正向電壓下降: 恢復(fù)時(shí)間:1.2 us 正向連續(xù)電流:2 A 最大浪涌電流:35 A 反向電流 IR:5 uA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DO-221AC 封裝:Reel |
| D-951-10 | 制造商:MOLEX 制造商全稱:Molex Electronics Ltd. 功能描述:NylaKrimp? Funnel Entry Ring Tongue Terminal for 8 AWG Wire, Stud #5 |
| D-951-14 | 制造商:ETC MOLEX-INACTIVE 功能描述:Cross Referenced to MOLEX - Part: MOL19067-0018 |
| D-951-38 | 制造商:ETC MOLEX-INACTIVE 功能描述:Cross Referenced to MOLEX - Part: MOL19067-0022 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。