參數(shù)資料
型號: DAC1208D750HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
中文描述: SERIAL INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù): 28/98頁
文件大?。?/td> 554K
代理商: DAC1208D750HN
DAC1208D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 6 December 2010
28 of 98
NXP Semiconductors
DAC1208D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
Table 11.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
10.8 DAC transfer function
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
(3)
The output current depends on the digital input data:
(4)
(5)
The setting applied to register COMMON bit DF (register 00h[2]; see
Table 17 “Page 0
register allocation map”
) defines whether the DAC1208D750 operates with a binary input
or a two’s complement input.
Table 12
shows the output current as a function of the input data, when I
O(fs)
= 20 mA.
Table 12.
Data
Inversion filter coefficients
Upper
H(9)
H(8)
H(7)
H(6)
-
Value
2
4
10
35
401
DAC transfer function
I13/Q13 to I0/Q0
Binary
0000 0000 0000
...
1000 0000 0000
...
1111 1111 1111
IOUTnP
IOUTnN
Two’s complement
1000 0000 0000
...
0000 0000 0000
...
0111 1111 1111
0
...
2048
...
4095
0 mA
...
10 mA
...
20 mA
20 mA
...
10 mA
...
0 mA
I
O fs
I
IOUTP
I
IOUTN
+
=
I
IOUTP
I
O fs
4095
---------------
×
=
I
IOUTN
I
O fs
---------------------------------
4095
×
=
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