參數(shù)資料
型號(hào): DAC1208D750HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
中文描述: SERIAL INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù): 60/98頁
文件大?。?/td> 554K
代理商: DAC1208D750HN
DAC1208D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 6 December 2010
60 of 98
NXP Semiconductors
DAC1208D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
1
SELECT_RF_F10_LN1
R/W
lane 1 sampling mode
din_ca_ln1 sampled at falling edge f10_ln1
din_ca_ln1 sampled at rising edge f10_ln1
lane 0 sampling mode
din_ca_ln0 sampled at falling edge f10_ln0
din_ca_ln0 sampled at rising edge f10_ln0
0
1
0
SELECT_RF_F10_LN0
R/W
0
1
Table 84.
Bit
CA_CNTRL register (address 05h) bit description
…continued
Symbol
Access
Value
Description
Table 85.
Bit
7
SCR_CNTRL register (address 06h) bit description
Symbol
MAN_SCR_LN3
Access
R/W
Value
Description
lane 3 manual scrambling
scrambling lane 3 off (when force_scr_ln3 = 1)
scrambling lane 3 on (when force_scr_ln3 = 1)
lane 2 manual scrambling
scrambling lane 2 off (when force_scr_ln2 = 1)
scrambling lane 2 on (when force_scr_ln2 = 1)
lane 1 manual scrambling
scrambling lane 1 off (when force_scr_ln1 = 1)
scrambling lane 1 on (when force_scr_ln1 = 1)
lane 0 manual scrambling
0
1
6
MAN_SCR_LN2
R/W
0
1
5
MAN_SCR_LN1
R/W
0
1
4
MAN_SCR_LN0
R/W
0
1
scrambling lane 0 off (when force_scr_ln0 = 1)
scrambling lane 0 on (when force_scr_ln0 = 1)
lane 3 scrambling mode
scrambling lane 3 depends on lock_ln3 and
en_scr
scrambling lane 3 depends on man_scr_ln3
lane 2 scrambling mode
scrambling lane 2 depends on lock_ln2 and
en_scr
scrambling lane 2 depends on man_scr_ln2
lane 1 scrambling mode
scrambling lane 1 depends on lock_ln1 and
en_scr
scrambling lane 1 depends on man_scr_ln1
lane 0 scrambling mode
scrambling lane 0 depends on lock_ln0 and
en_scr
scrambling lane 0 depends on man_scr_ln0
3
FORCE_SCR_LN3
R/W
0
1
2
FORCE_SCR_LN2
R/W
0
1
1
FORCE_SCR_LN1
R/W
0
1
0
FORCE_SCR_LN0
R/W
0
1
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DAC1208D750HN Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
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