參數(shù)資料
型號: DAC1208D750HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
中文描述: SERIAL INPUT LOADING, 0.02 us SETTLING TIME, 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù): 33/98頁
文件大?。?/td> 554K
代理商: DAC1208D750HN
DAC1208D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 6 December 2010
33 of 98
NXP Semiconductors
DAC1208D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.13 Output configuration
10.13.1
Basic output configuration
The use of a differentially-coupled transformer output provides optimum distortion
performance (see
Figure 19
). In addition, it helps to match the impedance and provides
electrical isolation.
The DAC1208D750 can operate at a V
o(p-p)
of 2 V differential outputs. In this
configuration, it is recommended to connect the center tap of the transformer to a 62
Ω
resistor connected to the 3.3 V analog power supply in order to adjust the DC
common-mode to approximately 2.7 V (see
Figure 20
).
Fig 19. 1 V
o(p-p)
differential output with transformer
Fig 20. 2 V
o(p-p)
differential output with transformer
001aaj817
50
Ω
50
Ω
50
Ω
IOUTnP/IOUTnN; V
o(cm)
= 2.8 V; V
o(dif)(p-p)
= 1 V
IOUTnP
IOUTnN
0 mA to 20 mA
2:1
0 mA to 20 mA
V
DDA(3V3)
V
DDA(3V3)
001aaj818
50
Ω
100
Ω
100
Ω
IOUTnP/IOUTnN; V
o(cm)
= 2.7 V; V
o(dif)(p-p)
= 2 V
IOUTnP
IOUTnN
0 mA to 20 mA
4:1
0 mA to 20 mA
V
DDA(3V3)
62
Ω
V
DDA(3V3)
V
DDA(3V3)
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PDF描述
DAC1208D750HN Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
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