參數(shù)資料
型號(hào)： DS1878T+T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 78/101頁(yè)
文件大?。?/td> 0K
描述： IC CTLR SFP W/DGTL LDD RX 28TQFN
標(biāo)準(zhǔn)包裝： 2,500
類(lèi)型： SFP+ 控制器
輸入類(lèi)型： 模擬，數(shù)字
輸出類(lèi)型： 數(shù)字
接口： I²C，LDD，串行
電流 - 電源： 2.5mA
安裝類(lèi)型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
DS1878
SFP+ Controller with Digital LDD Interface
78
______________________________________________________________________________________
Table 02h, Register C0h: PW_ENA
FACTORY DEFAULT
10h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
C0h
RWTBL78
RWTBL1C
RWTBL2
RWTBL1A
RWTBL1B
WLOWER
WAUXA
WAUXB
BIT 7
BIT 0
BIT 7
RWTBL78: Tables 07h–08h
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 6
RWTBL1C: Table 01h or 05h bytes F8h–FFh. Table address is dependent on MASK bit (Table 02h,
Register 89h).
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 5
RWTBL2: Tables 02h, except for PW1 value locations (Table 02h, Registers B0h–B3h).
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 4
RWTBL1A: Read and Write Table 01h, Registers 80h–BFh
0 = Read and write access for PW2 only.
1 = (Default) Read and write access for both PW1 and PW2.
BIT 3
RWTBL1B: Read and Write Table 01h, Registers C0h–F7h
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 2
WLOWER: Write Lower Memory Bytes 00h–5Fh in main memory. All users can read this area.
0 = (Default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
BIT 1
WAUXA: Write Auxiliary Memory, Registers 00h–7Fh. All users can read this area. Also see Table
02h, Register C1h, PW_ENB.
0 = (Default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
BIT 0
WAUXB: Write Auxiliary Memory, Registers 80h–FFh. All users can read this area. Also see Table
02h, Register C1h, PW_ENB.
0 = (Default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
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